rstctrl_offs     2871 arch/arm/mach-omap2/omap_hwmod.c 					 oh->prcm.omap4.rstctrl_offs);
rstctrl_offs     2898 arch/arm/mach-omap2/omap_hwmod.c 					   oh->prcm.omap4.rstctrl_offs,
rstctrl_offs     2899 arch/arm/mach-omap2/omap_hwmod.c 					   oh->prcm.omap4.rstctrl_offs +
rstctrl_offs     2925 arch/arm/mach-omap2/omap_hwmod.c 					      oh->prcm.omap4.rstctrl_offs);
rstctrl_offs     2964 arch/arm/mach-omap2/omap_hwmod.c 					   oh->prcm.omap4.rstctrl_offs,
rstctrl_offs      378 arch/arm/mach-omap2/omap_hwmod.h 	u16		rstctrl_offs;
rstctrl_offs       28 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c #define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))
rstctrl_offs       76 arch/arm/mach-omap2/omap_hwmod_33xx_data.c 			.rstctrl_offs	= AM33XX_RM_WKUP_RSTCTRL_OFFSET,
rstctrl_offs       67 arch/arm/mach-omap2/omap_hwmod_43xx_data.c 			.rstctrl_offs	= AM43XX_RM_WKUP_RSTCTRL_OFFSET,
rstctrl_offs      506 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 			.rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
rstctrl_offs     1163 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 			.rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
rstctrl_offs     1247 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 			.rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
rstctrl_offs     1560 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 			.rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
rstctrl_offs     1592 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 			.rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
rstctrl_offs      915 arch/arm/mach-omap2/omap_hwmod_54xx_data.c 			.rstctrl_offs = OMAP54XX_RM_DSP_RSTCTRL_OFFSET,
rstctrl_offs      937 arch/arm/mach-omap2/omap_hwmod_54xx_data.c 			.rstctrl_offs = OMAP54XX_RM_IPU_RSTCTRL_OFFSET,
rstctrl_offs     1120 arch/arm/mach-omap2/omap_hwmod_7xx_data.c 			.rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
rstctrl_offs     1143 arch/arm/mach-omap2/omap_hwmod_7xx_data.c 			.rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
rstctrl_offs       68 arch/arm/mach-omap2/prm33xx.c 					    u16 rstctrl_offs)
rstctrl_offs       72 arch/arm/mach-omap2/prm33xx.c 	v = am33xx_prm_read_reg(inst, rstctrl_offs);
rstctrl_offs       94 arch/arm/mach-omap2/prm33xx.c 				       u16 rstctrl_offs)
rstctrl_offs       98 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs);
rstctrl_offs      123 arch/arm/mach-omap2/prm33xx.c 					 s16 inst, u16 rstctrl_offs,
rstctrl_offs      130 arch/arm/mach-omap2/prm33xx.c 	if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0)
rstctrl_offs      139 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
rstctrl_offs      100 arch/arm/mach-omap2/prminst44xx.c 					u16 rstctrl_offs)
rstctrl_offs      104 arch/arm/mach-omap2/prminst44xx.c 	v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs);
rstctrl_offs      124 arch/arm/mach-omap2/prminst44xx.c 				   u16 rstctrl_offs)
rstctrl_offs      128 arch/arm/mach-omap2/prminst44xx.c 	omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, rstctrl_offs);
rstctrl_offs      153 arch/arm/mach-omap2/prminst44xx.c 				     u16 rstctrl_offs, u16 rstst_offs)
rstctrl_offs      161 arch/arm/mach-omap2/prminst44xx.c 						rstctrl_offs) == 0)
rstctrl_offs      168 arch/arm/mach-omap2/prminst44xx.c 	omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs);
rstctrl_offs       28 arch/arm/mach-omap2/prminst44xx.h 					       u16 rstctrl_offs);
rstctrl_offs       30 arch/arm/mach-omap2/prminst44xx.h 					  u16 rstctrl_offs);
rstctrl_offs       32 arch/arm/mach-omap2/prminst44xx.h 				     s16 inst, u16 rstctrl_offs,