rst_reg            24 drivers/clk/tegra/clk-periph-fixed.c 		value = readl(fixed->base + fixed->regs->rst_reg);
rst_reg            27 drivers/clk/tegra/clk-periph-gate.c 	readl_relaxed(gate->clk_base + (gate->regs->rst_reg))
rst_reg            83 drivers/clk/tegra/clk.c 		.rst_reg = RST_DEVICES_L,
rst_reg            91 drivers/clk/tegra/clk.c 		.rst_reg = RST_DEVICES_H,
rst_reg            99 drivers/clk/tegra/clk.c 		.rst_reg = RST_DEVICES_U,
rst_reg           107 drivers/clk/tegra/clk.c 		.rst_reg = RST_DEVICES_V,
rst_reg           115 drivers/clk/tegra/clk.c 		.rst_reg = RST_DEVICES_W,
rst_reg           123 drivers/clk/tegra/clk.c 		.rst_reg = RST_DEVICES_X,
rst_reg           131 drivers/clk/tegra/clk.c 		.rst_reg = RST_DEVICES_Y,
rst_reg           472 drivers/clk/tegra/clk.h 	u32 rst_reg;
rst_reg          1901 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg          2361 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           108 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           123 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           176 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           191 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           112 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				  SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           121 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				  rst_reg, 1);
rst_reg           208 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           222 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           243 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           246 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           268 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					rst_reg, 1);
rst_reg           281 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           103 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           119 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           169 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           185 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           109 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           123 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           144 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 1);
rst_reg           147 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           169 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					rst_reg, 1);
rst_reg           182 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					SMC_SYSCON_RESET_CNTL, rst_reg, 0);
rst_reg           416 drivers/net/ethernet/marvell/octeontx2/af/rvu.c static void rvu_block_reset(struct rvu *rvu, int blkaddr, u64 rst_reg)
rst_reg           423 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0));
rst_reg           424 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);