rst_lines        1475 arch/arm/mach-omap2/omap_hwmod.c 		const char *rst_line = oh->rst_lines[i].name;
rst_lines        1477 arch/arm/mach-omap2/omap_hwmod.c 			ohri->rst_shift = oh->rst_lines[i].rst_shift;
rst_lines        1478 arch/arm/mach-omap2/omap_hwmod.c 			ohri->st_shift = oh->rst_lines[i].st_shift;
rst_lines        1640 arch/arm/mach-omap2/omap_hwmod.c 		if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
rst_lines        1666 arch/arm/mach-omap2/omap_hwmod.c 		if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
rst_lines        1828 arch/arm/mach-omap2/omap_hwmod.c 				_assert_hardreset(oh, oh->rst_lines[i].name);
rst_lines        2122 arch/arm/mach-omap2/omap_hwmod.c 		_assert_hardreset(oh, oh->rst_lines[i].name);
rst_lines         581 arch/arm/mach-omap2/omap_hwmod.h 	struct omap_hwmod_rst_info	*rst_lines;
rst_lines          55 arch/arm/mach-omap2/omap_hwmod_2420_data.c 	.rst_lines	= omap2420_iva_resets,
rst_lines          74 arch/arm/mach-omap2/omap_hwmod_2420_data.c 	.rst_lines	= omap2420_dsp_resets,
rst_lines          50 arch/arm/mach-omap2/omap_hwmod_2430_data.c 	.rst_lines	= omap2430_iva_resets,
rst_lines         161 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c 	.rst_lines	= am33xx_pruss_resets,
rst_lines         185 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c 	.rst_lines	= am33xx_gfx_resets,
rst_lines          81 arch/arm/mach-omap2/omap_hwmod_33xx_data.c 	.rst_lines	= am33xx_wkup_m3_resets,
rst_lines         103 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c 	.rst_lines	= omap3xxx_iva_resets,
rst_lines        1556 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c 	.rst_lines	= omap3xxx_sad2d_resets,
rst_lines        2199 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c 	.rst_lines	= omap3xxx_mmu_iva_resets,
rst_lines          72 arch/arm/mach-omap2/omap_hwmod_43xx_data.c 	.rst_lines	= am33xx_wkup_m3_resets,
rst_lines         500 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 	.rst_lines	= omap44xx_dsp_resets,
rst_lines        1157 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 	.rst_lines	= omap44xx_ipu_resets,
rst_lines        1241 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 	.rst_lines	= omap44xx_iva_resets,
rst_lines        1554 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 	.rst_lines	= omap44xx_mmu_ipu_resets,
rst_lines        1586 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 	.rst_lines	= omap44xx_mmu_dsp_resets,
rst_lines        1747 arch/arm/mach-omap2/omap_hwmod_44xx_data.c 	.rst_lines	= omap44xx_prm_resets,
rst_lines         909 arch/arm/mach-omap2/omap_hwmod_54xx_data.c 	.rst_lines	= omap54xx_mmu_dsp_resets,
rst_lines         931 arch/arm/mach-omap2/omap_hwmod_54xx_data.c 	.rst_lines	= omap54xx_mmu_ipu_resets,
rst_lines        1093 arch/arm/mach-omap2/omap_hwmod_7xx_data.c 		omap_hwmod_assert_hardreset(oh, oh->rst_lines[i].name);
rst_lines        1094 arch/arm/mach-omap2/omap_hwmod_7xx_data.c 		omap_hwmod_deassert_hardreset(oh, oh->rst_lines[i].name);
rst_lines        1114 arch/arm/mach-omap2/omap_hwmod_7xx_data.c 	.rst_lines	= dra7xx_pciess1_resets,
rst_lines        1137 arch/arm/mach-omap2/omap_hwmod_7xx_data.c 	.rst_lines	= dra7xx_pciess2_resets,