Rt2               226 arch/arm/kvm/coproc.c 		vcpu_cp15(vcpu, r->reg + 1) = *vcpu_reg(vcpu, p->Rt2);
Rt2               242 arch/arm/kvm/coproc.c 	reg = (u64)*vcpu_reg(vcpu, p->Rt2) << 32;
Rt2               325 arch/arm/kvm/coproc.c 		val = (u64)*vcpu_reg(vcpu, p->Rt2) << 32;
Rt2               333 arch/arm/kvm/coproc.c 		*vcpu_reg(vcpu, p->Rt2) = val >> 32;
Rt2               618 arch/arm/kvm/coproc.c 	params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
Rt2               684 arch/arm/kvm/coproc.c 	params.Rt2 = 0;
Rt2                16 arch/arm/kvm/coproc.h 	unsigned long Rt2;
Rt2              2127 arch/arm64/kvm/sys_regs.c 	int Rt2 = (hsr >> 10) & 0x1f;
Rt2              2145 arch/arm64/kvm/sys_regs.c 		params.regval |= vcpu_get_reg(vcpu, Rt2) << 32;
Rt2              2160 arch/arm64/kvm/sys_regs.c 			vcpu_set_reg(vcpu, Rt2, upper_32_bits(params.regval));
Rt2                70 arch/arm64/net/bpf_jit.h #define A64_LS_PAIR(Rt, Rt2, Rn, offset, ls, type) \
Rt2                71 arch/arm64/net/bpf_jit.h 	aarch64_insn_gen_load_store_pair(Rt, Rt2, Rn, offset, \
Rt2                75 arch/arm64/net/bpf_jit.h #define A64_PUSH(Rt, Rt2, Rn) A64_LS_PAIR(Rt, Rt2, Rn, -16, STORE, PRE_INDEX)
Rt2                77 arch/arm64/net/bpf_jit.h #define A64_POP(Rt, Rt2, Rn)  A64_LS_PAIR(Rt, Rt2, Rn, 16, LOAD, POST_INDEX)