rq_sizing         167 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		const display_data_rq_sizing_params_st rq_sizing)
rq_sizing         170 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	print__data_rq_sizing_params_st(mode_lib, rq_sizing);
rq_sizing         172 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	rq_regs->chunk_size = dml_log2(rq_sizing.chunk_bytes) - 10;
rq_sizing         174 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	if (rq_sizing.min_chunk_bytes == 0)
rq_sizing         177 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		rq_regs->min_chunk_size = dml_log2(rq_sizing.min_chunk_bytes) - 8 + 1;
rq_sizing         179 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10;
rq_sizing         180 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	if (rq_sizing.min_meta_chunk_bytes == 0)
rq_sizing         183 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		rq_regs->min_meta_chunk_size = dml_log2(rq_sizing.min_meta_chunk_bytes) - 6 + 1;
rq_sizing         185 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	rq_regs->dpte_group_size = dml_log2(rq_sizing.dpte_group_bytes) - 6;
rq_sizing         186 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	rq_regs->mpte_group_size = dml_log2(rq_sizing.mpte_group_bytes) - 6;
rq_sizing         167 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		const display_data_rq_sizing_params_st rq_sizing)
rq_sizing         170 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	print__data_rq_sizing_params_st(mode_lib, rq_sizing);
rq_sizing         172 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	rq_regs->chunk_size = dml_log2(rq_sizing.chunk_bytes) - 10;
rq_sizing         174 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	if (rq_sizing.min_chunk_bytes == 0)
rq_sizing         177 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		rq_regs->min_chunk_size = dml_log2(rq_sizing.min_chunk_bytes) - 8 + 1;
rq_sizing         179 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10;
rq_sizing         180 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	if (rq_sizing.min_meta_chunk_bytes == 0)
rq_sizing         183 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		rq_regs->min_meta_chunk_size = dml_log2(rq_sizing.min_meta_chunk_bytes) - 6 + 1;
rq_sizing         185 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	rq_regs->dpte_group_size = dml_log2(rq_sizing.dpte_group_bytes) - 6;
rq_sizing         186 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	rq_regs->mpte_group_size = dml_log2(rq_sizing.mpte_group_bytes) - 6;
rq_sizing         145 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		const display_data_rq_sizing_params_st rq_sizing)
rq_sizing         148 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	print__data_rq_sizing_params_st(mode_lib, rq_sizing);
rq_sizing         150 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	rq_regs->chunk_size = dml_log2(rq_sizing.chunk_bytes) - 10;
rq_sizing         152 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	if (rq_sizing.min_chunk_bytes == 0)
rq_sizing         155 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		rq_regs->min_chunk_size = dml_log2(rq_sizing.min_chunk_bytes) - 8 + 1;
rq_sizing         157 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10;
rq_sizing         158 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	if (rq_sizing.min_meta_chunk_bytes == 0)
rq_sizing         161 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		rq_regs->min_meta_chunk_size = dml_log2(rq_sizing.min_meta_chunk_bytes) - 6 + 1;
rq_sizing         163 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	rq_regs->dpte_group_size = dml_log2(rq_sizing.dpte_group_bytes) - 6;
rq_sizing         164 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	rq_regs->mpte_group_size = dml_log2(rq_sizing.mpte_group_bytes) - 6;
rq_sizing          50 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c void print__data_rq_sizing_params_st(struct display_mode_lib *mode_lib, display_data_rq_sizing_params_st rq_sizing)
rq_sizing          54 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 	dml_print("DML_RQ_DLG_CALC:    chunk_bytes           = %0d\n", rq_sizing.chunk_bytes);
rq_sizing          55 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 	dml_print("DML_RQ_DLG_CALC:    min_chunk_bytes       = %0d\n", rq_sizing.min_chunk_bytes);
rq_sizing          56 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 	dml_print("DML_RQ_DLG_CALC:    meta_chunk_bytes      = %0d\n", rq_sizing.meta_chunk_bytes);
rq_sizing          59 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			rq_sizing.min_meta_chunk_bytes);
rq_sizing          60 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 	dml_print("DML_RQ_DLG_CALC:    mpte_group_bytes      = %0d\n", rq_sizing.mpte_group_bytes);
rq_sizing          61 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 	dml_print("DML_RQ_DLG_CALC:    dpte_group_bytes      = %0d\n", rq_sizing.dpte_group_bytes);
rq_sizing          36 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.h void print__data_rq_sizing_params_st(struct display_mode_lib *mode_lib, display_data_rq_sizing_params_st rq_sizing);
rq_sizing         209 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		const struct _vcs_dpi_display_data_rq_sizing_params_st rq_sizing)
rq_sizing         212 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	print__data_rq_sizing_params_st(mode_lib, rq_sizing);
rq_sizing         214 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	rq_regs->chunk_size = dml_log2(rq_sizing.chunk_bytes) - 10;
rq_sizing         216 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	if (rq_sizing.min_chunk_bytes == 0)
rq_sizing         219 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		rq_regs->min_chunk_size = dml_log2(rq_sizing.min_chunk_bytes) - 8 + 1;
rq_sizing         221 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10;
rq_sizing         222 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	if (rq_sizing.min_meta_chunk_bytes == 0)
rq_sizing         225 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		rq_regs->min_meta_chunk_size = dml_log2(rq_sizing.min_meta_chunk_bytes) - 6 + 1;
rq_sizing         227 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	rq_regs->dpte_group_size = dml_log2(rq_sizing.dpte_group_bytes) - 6;
rq_sizing         228 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	rq_regs->mpte_group_size = dml_log2(rq_sizing.mpte_group_bytes) - 6;