rq_l 196 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_l), rq_param.sizing.rq_l); rq_l 198 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_l.dpte_row_height), rq_l 207 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height); rq_l 212 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c if (rq_param.sizing.rq_l.chunk_bytes >= 32 * 1024) { //32kb rq_l 222 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c if ((double) rq_param.misc.rq_l.stored_swath_bytes rq_l 251 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_swath_bytes_packed_l = rq_param->misc.rq_l.full_swath_bytes; rq_l 255 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2 / 3, rq_l 290 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_param->misc.rq_l.stored_swath_bytes = swath_bytes_l; rq_l 297 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_height) - req128_l; rq_l 300 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_width) - req128_l; rq_l 303 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_param->dlg.rq_l.swath_height = 1 << log2_swath_height_l; rq_l 730 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c &(rq_param->sizing.rq_l), rq_l 731 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c &(rq_param->dlg.rq_l), rq_l 732 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c &(rq_param->misc.rq_l), rq_l 987 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c swath_width_ub_l = rq_dlg_param.rq_l.swath_width_ub; rq_l 989 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c dpte_groups_per_row_ub_l = rq_dlg_param.rq_l.dpte_groups_per_row_ub; rq_l 998 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub; rq_l 1128 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c req_per_swath_ub_l = rq_dlg_param.rq_l.req_per_swath_ub; rq_l 1130 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c meta_row_height_l = rq_dlg_param.rq_l.meta_row_height; rq_l 1136 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c dpte_row_height_l = rq_dlg_param.rq_l.dpte_row_height; rq_l 196 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_l), rq_param.sizing.rq_l); rq_l 198 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_l.dpte_row_height), rq_l 207 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height); rq_l 212 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c if (rq_param.sizing.rq_l.chunk_bytes >= 32 * 1024) { //32kb rq_l 222 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c if ((double) rq_param.misc.rq_l.stored_swath_bytes rq_l 251 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_swath_bytes_packed_l = rq_param->misc.rq_l.full_swath_bytes; rq_l 255 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2 / 3, rq_l 290 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_param->misc.rq_l.stored_swath_bytes = swath_bytes_l; rq_l 297 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_height) - req128_l; rq_l 300 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_width) - req128_l; rq_l 303 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_param->dlg.rq_l.swath_height = 1 << log2_swath_height_l; rq_l 730 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c &(rq_param->sizing.rq_l), rq_l 731 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c &(rq_param->dlg.rq_l), rq_l 732 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c &(rq_param->misc.rq_l), rq_l 987 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c swath_width_ub_l = rq_dlg_param.rq_l.swath_width_ub; rq_l 989 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c dpte_groups_per_row_ub_l = rq_dlg_param.rq_l.dpte_groups_per_row_ub; rq_l 998 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub; rq_l 1128 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c req_per_swath_ub_l = rq_dlg_param.rq_l.req_per_swath_ub; rq_l 1130 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c meta_row_height_l = rq_dlg_param.rq_l.meta_row_height; rq_l 1136 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c dpte_row_height_l = rq_dlg_param.rq_l.dpte_row_height; rq_l 175 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_l), rq_param.sizing.rq_l); rq_l 178 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c dml_log2(rq_param.dlg.rq_l.dpte_row_height), rq_l 188 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height); rq_l 193 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c if (rq_param.sizing.rq_l.chunk_bytes >= 32 * 1024) { //32kb rq_l 203 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c if ((double) rq_param.misc.rq_l.stored_swath_bytes rq_l 234 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_swath_bytes_packed_l = rq_param->misc.rq_l.full_swath_bytes; rq_l 239 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_param->misc.rq_l.full_swath_bytes * 2 / 3, rq_l 275 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_param->misc.rq_l.stored_swath_bytes = swath_bytes_l; rq_l 282 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_height) - req128_l; rq_l 285 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_width) - req128_l; rq_l 288 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_param->dlg.rq_l.swath_height = 1 << log2_swath_height_l; rq_l 774 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c &(rq_param->sizing.rq_l), rq_l 775 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c &(rq_param->dlg.rq_l), rq_l 776 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c &(rq_param->misc.rq_l), rq_l 1033 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c swath_width_ub_l = rq_dlg_param.rq_l.swath_width_ub; rq_l 1034 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c dpte_groups_per_row_ub_l = rq_dlg_param.rq_l.dpte_groups_per_row_ub; rq_l 1038 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub; rq_l 1180 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c req_per_swath_ub_l = rq_dlg_param.rq_l.req_per_swath_ub; rq_l 1182 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c meta_row_height_l = rq_dlg_param.rq_l.meta_row_height; rq_l 1188 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c dpte_row_height_l = rq_dlg_param.rq_l.dpte_row_height; rq_l 386 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h display_data_rq_dlg_params_st rq_l; rq_l 391 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h display_data_rq_sizing_params_st rq_l; rq_l 396 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h display_data_rq_misc_params_st rq_l; rq_l 34 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c print__data_rq_sizing_params_st(mode_lib, rq_param.sizing.rq_l); rq_l 39 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c print__data_rq_dlg_params_st(mode_lib, rq_param.dlg.rq_l); rq_l 44 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c print__data_rq_misc_params_st(mode_lib, rq_param.misc.rq_l); rq_l 130 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c print__data_rq_dlg_params_st(mode_lib, rq_dlg_param.rq_l); rq_l 239 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_l), rq_param.sizing.rq_l); rq_l 243 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height); rq_l 249 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c if (rq_param.sizing.rq_l.chunk_bytes >= 32 * 1024) { /*32kb */ rq_l 259 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c if ((double) rq_param.misc.rq_l.stored_swath_bytes rq_l 290 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_swath_bytes_packed_l = rq_param->misc.rq_l.full_swath_bytes; rq_l 295 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_param->misc.rq_l.full_swath_bytes * 2 / 3, rq_l 341 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_param->misc.rq_l.stored_swath_bytes = swath_bytes_l; rq_l 348 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_height) - req128_l; rq_l 351 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c log2_swath_height_l = dml_log2(rq_param->misc.rq_l.blk256_width) - req128_l; rq_l 354 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_param->dlg.rq_l.swath_height = 1 << log2_swath_height_l; rq_l 954 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c &(rq_param->sizing.rq_l), rq_l 955 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c &(rq_param->dlg.rq_l), rq_l 956 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c &(rq_param->misc.rq_l), rq_l 1212 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c swath_height_l = rq_dlg_param.rq_l.swath_height; rq_l 1213 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c swath_width_ub_l = rq_dlg_param.rq_l.swath_width_ub; rq_l 1214 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c dpte_bytes_per_row_ub_l = rq_dlg_param.rq_l.dpte_bytes_per_row_ub; rq_l 1215 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c dpte_groups_per_row_ub_l = rq_dlg_param.rq_l.dpte_groups_per_row_ub; rq_l 1216 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_pte_bytes_per_frame_ub_l = rq_dlg_param.rq_l.meta_pte_bytes_per_frame_ub; rq_l 1217 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_bytes_per_row_ub_l = rq_dlg_param.rq_l.meta_bytes_per_row_ub; rq_l 1224 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub; rq_l 1535 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c req_per_swath_ub_l = rq_dlg_param.rq_l.req_per_swath_ub; rq_l 1537 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_row_height_l = rq_dlg_param.rq_l.meta_row_height; rq_l 1542 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c dpte_row_height_l = rq_dlg_param.rq_l.dpte_row_height;