RfPath             14 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 Band, u8 RfPath,
RfPath             20 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	if (RfPath > ODM_RF_PATH_D) {
RfPath             21 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 		DBG_871X("Invalid Rf Path %d in PHY_GetTxPowerByRateBase()\n", RfPath);
RfPath             28 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0];
RfPath             31 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1];
RfPath             34 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2];
RfPath             37 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3];
RfPath             40 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4];
RfPath             43 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5];
RfPath             46 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6];
RfPath             49 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7];
RfPath             52 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8];
RfPath             55 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9];
RfPath             59 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 					 RateSection, RfPath, TxNum);
RfPath             65 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][0];
RfPath             68 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][1];
RfPath             71 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][2];
RfPath             74 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][3];
RfPath             77 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][4];
RfPath             80 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][5];
RfPath             83 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][6];
RfPath             86 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][7];
RfPath             89 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][8];
RfPath             93 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 					 RateSection, RfPath, TxNum);
RfPath            106 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	u8 RfPath,
RfPath            114 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	if (RfPath > ODM_RF_PATH_D) {
RfPath            115 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 		DBG_871X("Invalid Rf Path %d in phy_SetTxPowerByRatBase()\n", RfPath);
RfPath            122 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0] = Value;
RfPath            125 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1] = Value;
RfPath            128 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2] = Value;
RfPath            131 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3] = Value;
RfPath            134 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4] = Value;
RfPath            137 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5] = Value;
RfPath            140 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6] = Value;
RfPath            143 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7] = Value;
RfPath            146 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8] = Value;
RfPath            149 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9] = Value;
RfPath            153 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 					 RateSection, RfPath, TxNum);
RfPath            159 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][0] = Value;
RfPath            162 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][1] = Value;
RfPath            165 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][2] = Value;
RfPath            168 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][3] = Value;
RfPath            171 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][4] = Value;
RfPath            174 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][5] = Value;
RfPath            177 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][6] = Value;
RfPath            180 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][7] = Value;
RfPath            183 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 			pHalData->TxPwrByRateBase5G[RfPath][TxNum][8] = Value;
RfPath            187 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 					 RateSection, RfPath, TxNum);
RfPath            726 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	u32	RfPath,
RfPath            744 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	if (RfPath > ODM_RF_PATH_D) {
RfPath            745 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 		DBG_871X("Invalid RfPath %d\n", RfPath);
RfPath            759 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 		pHalData->TxPwrByRateOffset[Band][RfPath][TxNum][rateIndex[i]] = PwrByRateVal[i];
RfPath            790 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	u32	RfPath,
RfPath            801 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 		PHY_StoreTxPowerByRateNew(padapter, Band, RfPath, TxNum, RegAddr, BitMask, Data);
RfPath           1949 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	u8 *RfPath,
RfPath           1976 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	if (eqNByte(RateSection, (u8 *)("CCK"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2))
RfPath           1978 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("OFDM"), 4) && eqNByte(RfPath, (u8 *)("1T"), 2))
RfPath           1980 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("1T"), 2))
RfPath           1982 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("2T"), 2))
RfPath           1984 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("3T"), 2))
RfPath           1986 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("4T"), 2))
RfPath           1988 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2))
RfPath           1990 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("2T"), 2))
RfPath           1992 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("3T"), 2))
RfPath           1994 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("4T"), 2))
RfPath            175 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c 	u32 RfPath,
RfPath            185 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c 		PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data);
RfPath            234 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c 	u8 *RfPath,
RfPath            245 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c 		RfPath,
RfPath             29 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h 				   u32 RfPath,
RfPath             47 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h 				  u8 *RfPath,
RfPath             77 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u8 		RfPath,
RfPath            158 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u32 		RfPath,
RfPath            182 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u8 		RfPath,
RfPath            194 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u8 			*RfPath,
RfPath            499 drivers/staging/rtl8723bs/include/rtw_mp.h u32 mpt_ProQueryCalTxPower(struct adapter *padapter, u8 RfPath);