rpg_time_reset    104 drivers/infiniband/hw/mlx5/cong.c 				rpg_time_reset);
rpg_time_reset    172 drivers/infiniband/hw/mlx5/cong.c 			 rpg_time_reset, var);
rpg_time_reset     54 drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c 	__be32 rpg_time_reset;
rpg_time_reset    579 drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c 		qcn->rpg_time_reset[i] =
rpg_time_reset    580 drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c 			be32_to_cpu(hw_qcn->rpg_time_reset);
rpg_time_reset    640 drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c 		hw_qcn->rpg_time_reset = cpu_to_be32(qcn->rpg_time_reset[i]);
rpg_time_reset   1689 include/linux/mlx5/mlx5_ifc.h 	u8         rpg_time_reset[0x20];
rpg_time_reset   1729 include/linux/mlx5/mlx5_ifc.h 	u8         rpg_time_reset[0x20];
rpg_time_reset    122 include/uapi/linux/dcbnl.h 	__u32 rpg_time_reset[IEEE_8021QAZ_MAX_TCS];