rpcs              763 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		   u32 *rpcs)
rpcs              799 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	*rpcs = val;
rpcs              807 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected,
rpcs              823 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		rpcs, slices,
rpcs              824 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		(rpcs & GEN8_RPCS_S_CNT_ENABLE) ? "*" : "",
rpcs              825 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		(rpcs & GEN8_RPCS_SS_CNT_MASK) >> GEN8_RPCS_SS_CNT_SHIFT,
rpcs              826 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		(rpcs & GEN8_RPCS_SS_CNT_ENABLE) ? "*" : "");
rpcs              840 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	u32 rpcs = 0;
rpcs              850 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 				 flags & TEST_RESET ? NULL : spin, &rpcs);
rpcs              851 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	ret = __check_rpcs(name, rpcs, ret, expected, "Context", "!");
rpcs              855 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	ret = __read_slice_count(ce->engine->kernel_context, obj, NULL, &rpcs);
rpcs              856 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!");
rpcs              868 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		ret = __read_slice_count(ce, obj, NULL, &rpcs);
rpcs              869 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		ret = __check_rpcs(name, rpcs, ret, expected,
rpcs               35 drivers/gpu/drm/i915/gt/intel_sseu.c 	u32 rpcs = 0;
rpcs              126 drivers/gpu/drm/i915/gt/intel_sseu.c 		rpcs |= GEN8_RPCS_ENABLE | GEN8_RPCS_S_CNT_ENABLE | val;
rpcs              137 drivers/gpu/drm/i915/gt/intel_sseu.c 		rpcs |= GEN8_RPCS_ENABLE | GEN8_RPCS_SS_CNT_ENABLE | val;
rpcs              147 drivers/gpu/drm/i915/gt/intel_sseu.c 		rpcs |= val;
rpcs              153 drivers/gpu/drm/i915/gt/intel_sseu.c 		rpcs |= val;
rpcs              155 drivers/gpu/drm/i915/gt/intel_sseu.c 		rpcs |= GEN8_RPCS_ENABLE;
rpcs              158 drivers/gpu/drm/i915/gt/intel_sseu.c 	return rpcs;