rp0              7562 drivers/gpu/drm/i915/intel_pm.c 	u32 val, rp0;
rp0              7569 drivers/gpu/drm/i915/intel_pm.c 		rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS4EU_FUSE_SHIFT);
rp0              7573 drivers/gpu/drm/i915/intel_pm.c 		rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS6EU_FUSE_SHIFT);
rp0              7579 drivers/gpu/drm/i915/intel_pm.c 		rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS8EU_FUSE_SHIFT);
rp0              7583 drivers/gpu/drm/i915/intel_pm.c 	rp0 = (rp0 & FB_GFX_FREQ_FUSE_MASK);
rp0              7585 drivers/gpu/drm/i915/intel_pm.c 	return rp0;
rp0              7632 drivers/gpu/drm/i915/intel_pm.c 	u32 val, rp0;
rp0              7636 drivers/gpu/drm/i915/intel_pm.c 	rp0 = (val & FB_GFX_MAX_FREQ_FUSE_MASK) >> FB_GFX_MAX_FREQ_FUSE_SHIFT;
rp0              7638 drivers/gpu/drm/i915/intel_pm.c 	rp0 = min_t(u32, rp0, 0xea);
rp0              7640 drivers/gpu/drm/i915/intel_pm.c 	return rp0;
rp0               132 drivers/mtd/nand/raw/nand_ecc.c 	uint32_t rp0, rp1, rp2, rp3, rp4, rp5, rp6, rp7;
rp0               285 drivers/mtd/nand/raw/nand_ecc.c 	rp0 = (par >> 8) & 0xff;
rp0               289 drivers/mtd/nand/raw/nand_ecc.c 	rp0 = (par & 0xff);
rp0               324 drivers/mtd/nand/raw/nand_ecc.c 			  (invparity[rp1] << 1) | (invparity[rp0]);
rp0               333 drivers/mtd/nand/raw/nand_ecc.c 			  (invparity[rp1] << 1) | (invparity[rp0]);