ro_mask            98 drivers/gpu/drm/i915/gvt/handlers.c 		u32 addr_mask, u32 ro_mask, u32 device,
ro_mask           132 drivers/gpu/drm/i915/gvt/handlers.c 		info->ro_mask = ro_mask;
ro_mask          3552 drivers/gpu/drm/i915/gvt/handlers.c 		u64 ro_mask = mmio_info->ro_mask;
ro_mask          3560 drivers/gpu/drm/i915/gvt/handlers.c 		if (likely(!ro_mask))
ro_mask          3562 drivers/gpu/drm/i915/gvt/handlers.c 		else if (!~ro_mask) {
ro_mask          3568 drivers/gpu/drm/i915/gvt/handlers.c 			data &= ~ro_mask;
ro_mask          3569 drivers/gpu/drm/i915/gvt/handlers.c 			data |= vgpu_vreg(vgpu, offset) & ro_mask;
ro_mask            62 drivers/gpu/drm/i915/gvt/mmio.h 	u64 ro_mask;
ro_mask          5577 drivers/net/ethernet/broadcom/bnx2.c 		u32   ro_mask;
ro_mask          5693 drivers/net/ethernet/broadcom/bnx2.c 		u32 offset, rw_mask, ro_mask, save_val, val;
ro_mask          5701 drivers/net/ethernet/broadcom/bnx2.c 		ro_mask = reg_tbl[i].ro_mask;
ro_mask          5712 drivers/net/ethernet/broadcom/bnx2.c 		if ((val & ro_mask) != (save_val & ro_mask)) {
ro_mask          5723 drivers/net/ethernet/broadcom/bnx2.c 		if ((val & ro_mask) != (save_val & ro_mask)) {