rgrp 504 arch/x86/kernel/cpu/resctrl/ctrlmondata.c rr->rgrp = rdtgrp; rgrp 89 arch/x86/kernel/cpu/resctrl/internal.h struct rdtgroup *rgrp; rgrp 303 arch/x86/kernel/cpu/resctrl/monitor.c rdtgrp = rr->rgrp; rgrp 353 arch/x86/kernel/cpu/resctrl/monitor.c static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_domain *dom_mbm) rgrp 367 arch/x86/kernel/cpu/resctrl/monitor.c closid = rgrp->closid; rgrp 368 arch/x86/kernel/cpu/resctrl/monitor.c rmid = rgrp->mon.rmid; rgrp 385 arch/x86/kernel/cpu/resctrl/monitor.c head = &rgrp->mon.crdtgrp_list; rgrp 2757 arch/x86/kernel/cpu/resctrl/rdtgroup.c static void mkdir_rdt_prepare_clean(struct rdtgroup *rgrp) rgrp 2759 arch/x86/kernel/cpu/resctrl/rdtgroup.c kernfs_remove(rgrp->kn); rgrp 2760 arch/x86/kernel/cpu/resctrl/rdtgroup.c free_rmid(rgrp->mon.rmid); rgrp 2761 arch/x86/kernel/cpu/resctrl/rdtgroup.c kfree(rgrp); rgrp 1126 drivers/gpu/drm/rcar-du/rcar_du_crtc.c int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, rgrp 1133 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 1180 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->group = rgrp; rgrp 1188 drivers/gpu/drm/rcar-du/rcar_du_crtc.c primary = &rgrp->planes[swindex % 2].plane; rgrp 105 drivers/gpu/drm/rcar-du/rcar_du_crtc.h int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, rgrp 33 drivers/gpu/drm/rcar-du/rcar_du_group.c u32 rcar_du_group_read(struct rcar_du_group *rgrp, u32 reg) rgrp 35 drivers/gpu/drm/rcar-du/rcar_du_group.c return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg); rgrp 38 drivers/gpu/drm/rcar-du/rcar_du_group.c void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data) rgrp 40 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data); rgrp 43 drivers/gpu/drm/rcar-du/rcar_du_group.c static void rcar_du_group_setup_pins(struct rcar_du_group *rgrp) rgrp 47 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rgrp->channels_mask & BIT(0)) rgrp 50 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rgrp->channels_mask & BIT(1)) rgrp 53 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR6, defr6); rgrp 56 drivers/gpu/drm/rcar-du/rcar_du_group.c static void rcar_du_group_setup_defr8(struct rcar_du_group *rgrp) rgrp 58 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 69 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rgrp->index == 0) { rgrp 71 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rgrp->dev->vspd1_sink == 2) rgrp 80 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rgrp->index == rcdu->dpad0_source / 2) rgrp 84 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR8, defr8); rgrp 87 drivers/gpu/drm/rcar-du/rcar_du_group.c static void rcar_du_group_setup_didsr(struct rcar_du_group *rgrp) rgrp 89 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 103 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rcdu->info->gen < 3 && rgrp->index == 0) { rgrp 110 drivers/gpu/drm/rcar-du/rcar_du_group.c } else if (rcdu->info->gen == 3 && rgrp->num_crtcs > 1) { rgrp 115 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = &rcdu->crtcs[rgrp->index * 2]; rgrp 116 drivers/gpu/drm/rcar-du/rcar_du_group.c num_crtcs = rgrp->num_crtcs; rgrp 132 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DIDSR, didsr); rgrp 135 drivers/gpu/drm/rcar-du/rcar_du_group.c static void rcar_du_group_setup(struct rcar_du_group *rgrp) rgrp 137 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 140 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR, DEFR_CODE | DEFR_DEFE); rgrp 142 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR2, DEFR2_CODE | DEFR2_DEFE2G); rgrp 143 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR3, DEFR3_CODE | DEFR3_DEFE3); rgrp 144 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR4, DEFR4_CODE); rgrp 146 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5); rgrp 148 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_setup_pins(rgrp); rgrp 151 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_setup_defr8(rgrp); rgrp 152 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_setup_didsr(rgrp); rgrp 156 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DEFR10, DEFR10_CODE | DEFR10_DEFE10); rgrp 162 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DORCR, DORCR_PG1D_DS1 | DORCR_DPRS); rgrp 165 drivers/gpu/drm/rcar-du/rcar_du_group.c mutex_lock(&rgrp->lock); rgrp 166 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DPTSR, (rgrp->dptsr_planes << 16) | rgrp 167 drivers/gpu/drm/rcar-du/rcar_du_group.c rgrp->dptsr_planes); rgrp 168 drivers/gpu/drm/rcar-du/rcar_du_group.c mutex_unlock(&rgrp->lock); rgrp 181 drivers/gpu/drm/rcar-du/rcar_du_group.c int rcar_du_group_get(struct rcar_du_group *rgrp) rgrp 183 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rgrp->use_count) rgrp 186 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_setup(rgrp); rgrp 189 drivers/gpu/drm/rcar-du/rcar_du_group.c rgrp->use_count++; rgrp 198 drivers/gpu/drm/rcar-du/rcar_du_group.c void rcar_du_group_put(struct rcar_du_group *rgrp) rgrp 200 drivers/gpu/drm/rcar-du/rcar_du_group.c --rgrp->use_count; rgrp 203 drivers/gpu/drm/rcar-du/rcar_du_group.c static void __rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start) rgrp 205 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 215 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rcdu->info->channels_mask & BIT(rgrp->index * 2)) { rgrp 216 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_crtc *rcrtc = &rgrp->dev->crtcs[rgrp->index * 2]; rgrp 221 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DSYSR, rgrp 226 drivers/gpu/drm/rcar-du/rcar_du_group.c void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start) rgrp 241 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rgrp->used_crtcs++ != 0) rgrp 242 drivers/gpu/drm/rcar-du/rcar_du_group.c __rcar_du_group_start_stop(rgrp, false); rgrp 243 drivers/gpu/drm/rcar-du/rcar_du_group.c __rcar_du_group_start_stop(rgrp, true); rgrp 245 drivers/gpu/drm/rcar-du/rcar_du_group.c if (--rgrp->used_crtcs == 0) rgrp 246 drivers/gpu/drm/rcar-du/rcar_du_group.c __rcar_du_group_start_stop(rgrp, false); rgrp 250 drivers/gpu/drm/rcar-du/rcar_du_group.c void rcar_du_group_restart(struct rcar_du_group *rgrp) rgrp 252 drivers/gpu/drm/rcar-du/rcar_du_group.c rgrp->need_restart = false; rgrp 254 drivers/gpu/drm/rcar-du/rcar_du_group.c __rcar_du_group_start_stop(rgrp, false); rgrp 255 drivers/gpu/drm/rcar-du/rcar_du_group.c __rcar_du_group_start_stop(rgrp, true); rgrp 260 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_group *rgrp; rgrp 276 drivers/gpu/drm/rcar-du/rcar_du_group.c rgrp = &rcdu->groups[index]; rgrp 283 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_setup_defr8(rgrp); rgrp 290 drivers/gpu/drm/rcar-du/rcar_du_group.c static void rcar_du_group_set_dpad_levels(struct rcar_du_group *rgrp) rgrp 300 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 317 drivers/gpu/drm/rcar-du/rcar_du_group.c for (i = 0; i < rgrp->num_crtcs; ++i) { rgrp 321 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = &rcdu->crtcs[rgrp->index * 2 + i]; rgrp 328 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DOFLR, doflr); rgrp 331 drivers/gpu/drm/rcar-du/rcar_du_group.c int rcar_du_group_set_routing(struct rcar_du_group *rgrp) rgrp 333 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 334 drivers/gpu/drm/rcar-du/rcar_du_group.c u32 dorcr = rcar_du_group_read(rgrp, DORCR); rgrp 343 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rcdu->dpad1_source == rgrp->index * 2) rgrp 348 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_write(rgrp, DORCR, dorcr); rgrp 350 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_group_set_dpad_levels(rgrp); rgrp 352 drivers/gpu/drm/rcar-du/rcar_du_group.c return rcar_du_set_dpad0_vsp1_routing(rgrp->dev); rgrp 52 drivers/gpu/drm/rcar-du/rcar_du_group.h u32 rcar_du_group_read(struct rcar_du_group *rgrp, u32 reg); rgrp 53 drivers/gpu/drm/rcar-du/rcar_du_group.h void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data); rgrp 55 drivers/gpu/drm/rcar-du/rcar_du_group.h int rcar_du_group_get(struct rcar_du_group *rgrp); rgrp 56 drivers/gpu/drm/rcar-du/rcar_du_group.h void rcar_du_group_put(struct rcar_du_group *rgrp); rgrp 57 drivers/gpu/drm/rcar-du/rcar_du_group.h void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start); rgrp 58 drivers/gpu/drm/rcar-du/rcar_du_group.h void rcar_du_group_restart(struct rcar_du_group *rgrp); rgrp 59 drivers/gpu/drm/rcar-du/rcar_du_group.h int rcar_du_group_set_routing(struct rcar_du_group *rgrp); rgrp 671 drivers/gpu/drm/rcar-du/rcar_du_kms.c struct rcar_du_group *rgrp = &rcdu->groups[i]; rgrp 673 drivers/gpu/drm/rcar-du/rcar_du_kms.c mutex_init(&rgrp->lock); rgrp 675 drivers/gpu/drm/rcar-du/rcar_du_kms.c rgrp->dev = rcdu; rgrp 676 drivers/gpu/drm/rcar-du/rcar_du_kms.c rgrp->mmio_offset = mmio_offsets[i]; rgrp 677 drivers/gpu/drm/rcar-du/rcar_du_kms.c rgrp->index = i; rgrp 679 drivers/gpu/drm/rcar-du/rcar_du_kms.c rgrp->channels_mask = (rcdu->info->channels_mask >> (2 * i)) rgrp 681 drivers/gpu/drm/rcar-du/rcar_du_kms.c rgrp->num_crtcs = hweight8(rgrp->channels_mask); rgrp 689 drivers/gpu/drm/rcar-du/rcar_du_kms.c rgrp->dptsr_planes = rgrp->num_crtcs > 1 rgrp 694 drivers/gpu/drm/rcar-du/rcar_du_kms.c ret = rcar_du_planes_init(rgrp); rgrp 709 drivers/gpu/drm/rcar-du/rcar_du_kms.c struct rcar_du_group *rgrp; rgrp 715 drivers/gpu/drm/rcar-du/rcar_du_kms.c rgrp = &rcdu->groups[hwindex / 2]; rgrp 717 drivers/gpu/drm/rcar-du/rcar_du_kms.c ret = rcar_du_crtc_create(rgrp, swindex++, hwindex); rgrp 321 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_write(struct rcar_du_group *rgrp, rgrp 324 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg, rgrp 328 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_setup_scanout(struct rcar_du_group *rgrp, rgrp 365 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnMWR, rgrp 382 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnSPXR, src_x); rgrp 383 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnSPYR, src_y * rgrp 386 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDSA0R, dma[0]); rgrp 391 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnMWR, pitch); rgrp 393 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnSPXR, src_x); rgrp 394 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnSPYR, src_y * rgrp 397 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDSA0R, dma[1]); rgrp 401 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_setup_mode(struct rcar_du_group *rgrp, rgrp 419 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0); rgrp 421 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnALPHAR, rgrp 438 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnMR, pnmr); rgrp 445 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnTC2R, colorkey); rgrp 453 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnTC2R, colorkey); rgrp 458 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnTC3R, rgrp 464 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_setup_format_gen2(struct rcar_du_group *rgrp, rgrp 478 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_setup_mode(rgrp, index, state); rgrp 495 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2); rgrp 501 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4); rgrp 504 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_setup_format_gen3(struct rcar_du_group *rgrp, rgrp 508 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnMR, rgrp 511 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDDCR4, rgrp 515 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_setup_format(struct rcar_du_group *rgrp, rgrp 519 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 523 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_setup_format_gen2(rgrp, index, state); rgrp 525 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_setup_format_gen3(rgrp, index, state); rgrp 528 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDSXR, drm_rect_width(dst)); rgrp 529 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDSYR, drm_rect_height(dst)); rgrp 530 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDPXR, dst->x1); rgrp 531 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDPYR, dst->y1); rgrp 535 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnWASPR, 0); rgrp 536 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnWAMWR, 4095); rgrp 537 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnBTR, 0); rgrp 538 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnMLR, 0); rgrp 542 drivers/gpu/drm/rcar-du/rcar_du_plane.c void __rcar_du_plane_setup(struct rcar_du_group *rgrp, rgrp 545 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 547 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_setup_format(rgrp, state->hwindex, state); rgrp 549 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_setup_format(rgrp, (state->hwindex + 1) % 8, rgrp 553 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_setup_scanout(rgrp, state); rgrp 556 drivers/gpu/drm/rcar-du/rcar_du_plane.c unsigned int vspd1_sink = rgrp->index ? 2 : 0; rgrp 753 drivers/gpu/drm/rcar-du/rcar_du_plane.c int rcar_du_planes_init(struct rcar_du_group *rgrp) rgrp 755 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_device *rcdu = rgrp->dev; rgrp 764 drivers/gpu/drm/rcar-du/rcar_du_plane.c rgrp->num_planes = rgrp->num_crtcs + 7; rgrp 766 drivers/gpu/drm/rcar-du/rcar_du_plane.c crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index)); rgrp 768 drivers/gpu/drm/rcar-du/rcar_du_plane.c for (i = 0; i < rgrp->num_planes; ++i) { rgrp 769 drivers/gpu/drm/rcar-du/rcar_du_plane.c enum drm_plane_type type = i < rgrp->num_crtcs rgrp 772 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_plane *plane = &rgrp->planes[i]; rgrp 774 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane->group = rgrp; rgrp 73 drivers/gpu/drm/rcar-du/rcar_du_plane.h int rcar_du_planes_init(struct rcar_du_group *rgrp); rgrp 75 drivers/gpu/drm/rcar-du/rcar_du_plane.h void __rcar_du_plane_setup(struct rcar_du_group *rgrp,