rfld              371 drivers/gpu/drm/omapdrm/dss/dispc.c 	const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
rfld              373 drivers/gpu/drm/omapdrm/dss/dispc.c 	return REG_GET(dispc, rfld.reg, rfld.high, rfld.low);
rfld              379 drivers/gpu/drm/omapdrm/dss/dispc.c 	const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
rfld              380 drivers/gpu/drm/omapdrm/dss/dispc.c 	const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG;
rfld              385 drivers/gpu/drm/omapdrm/dss/dispc.c 		REG_FLD_MOD(dispc, rfld.reg, val, rfld.high, rfld.low);
rfld              388 drivers/gpu/drm/omapdrm/dss/dispc.c 		REG_FLD_MOD(dispc, rfld.reg, val, rfld.high, rfld.low);
rfld              263 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
rfld              264 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	return REG_GET(rfld.reg, rfld.high, rfld.low);
rfld              269 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
rfld              270 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG;
rfld              276 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low);