return_bw_todcn_per_state  212 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw_todcn_per_state =dcn_bw_min2(v->return_bus_width * v->dcfclk_per_state[i], v->fabric_and_dram_bandwidth_per_state[i] * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0);
return_bw_todcn_per_state  213 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw_per_state[i] = v->return_bw_todcn_per_state;
return_bw_todcn_per_state  214 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) {
return_bw_todcn_per_state  215 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bw_todcn_per_state  217 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0);
return_bw_todcn_per_state  219 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bw_todcn_per_state  221 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw_todcn_per_state =dcn_bw_min2(v->return_bus_width * v->dcfclk_per_state[i], v->fabric_and_dram_bandwidth_per_state[i] * 1000.0);
return_bw_todcn_per_state  222 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) {
return_bw_todcn_per_state  223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bw_todcn_per_state  225 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0);
return_bw_todcn_per_state  227 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bw_todcn_per_state  299 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float return_bw_todcn_per_state;