return_bw        1233 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->return_bw = v->return_bandwidth_to_dcn;
return_bw        1235 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bw        1239 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bw        1243 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bw        1247 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bw        1293 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->urgent_round_trip_and_out_of_order_latency = (v->round_trip_ping_latency_cycles + 32.0) / v->dcfclk + v->urgent_out_of_order_return_per_channel * v->number_of_channels / v->return_bw;
return_bw        1302 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->data_fabric_line_delivery_time_luma = v->swath_width_y[k] * v->swath_height_y[k] *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / (v->return_bw * v->read_bandwidth_plane_luma[k] / v->dpp_per_plane[k] / v->total_data_read_bandwidth);
return_bw        1314 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->data_fabric_line_delivery_time_chroma = v->swath_width_y[k] / 2.0 * v->swath_height_c[k] *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / (v->return_bw * v->read_bandwidth_plane_chroma[k] / v->dpp_per_plane[k] / v->total_data_read_bandwidth);
return_bw        1318 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->urgent_extra_latency = v->urgent_round_trip_and_out_of_order_latency + (v->total_active_dpp * v->pixel_chunk_size_in_kbyte + v->total_dcc_active_dpp * v->meta_chunk_size) * 1024.0 / v->return_bw;
return_bw        1320 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->urgent_extra_latency = v->urgent_extra_latency + v->total_active_dpp * v->pte_chunk_size * 1024.0 / v->return_bw;
return_bw        1383 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->stutter_burst_time = v->part_of_burst_that_fits_in_rob * (v->average_read_bandwidth_gbyte_per_second * 1000.0) / v->total_data_read_bandwidth / v->return_bw + (v->min_full_det_buffering_time * v->total_data_read_bandwidth - v->part_of_burst_that_fits_in_rob) / (v->dcfclk * 64.0);
return_bw        1423 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->effective_det_plus_lb_lines_luma =dcn_bw_floor2(v->lines_in_dety[k] +dcn_bw_min2(v->lines_in_dety[k] * v->dppclk * v->byte_per_pixel_dety[k] * v->pscl_throughput[k] / (v->return_bw / v->dpp_per_plane[k]), v->effective_lb_latency_hiding_source_lines_luma), v->swath_height_y[k]);
return_bw        1424 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->urgent_latency_support_us_luma = v->effective_det_plus_lb_lines_luma * (v->htotal[k] / v->pixel_clock[k]) / v->v_ratio[k] - v->effective_det_plus_lb_lines_luma * v->swath_width_y[k] * v->byte_per_pixel_dety[k] / (v->return_bw / v->dpp_per_plane[k]);
return_bw        1426 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->effective_det_plus_lb_lines_chroma =dcn_bw_floor2(v->lines_in_detc[k] +dcn_bw_min2(v->lines_in_detc[k] * v->dppclk * v->byte_per_pixel_detc[k] * v->pscl_throughput_chroma[k] / (v->return_bw / v->dpp_per_plane[k]), v->effective_lb_latency_hiding_source_lines_chroma), v->swath_height_c[k]);
return_bw        1427 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->urgent_latency_support_us_chroma = v->effective_det_plus_lb_lines_chroma * (v->htotal[k] / v->pixel_clock[k]) / (v->v_ratio[k] / 2.0) - v->effective_det_plus_lb_lines_chroma * (v->swath_width_y[k] / 2.0) * v->byte_per_pixel_detc[k] / (v->return_bw / v->dpp_per_plane[k]);
return_bw        1676 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->bandwidth_available_for_immediate_flip = v->return_bw;
return_bw        1771 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->max_rd_bandwidth <= v->return_bw && v->v_ratio_prefetch_more_than4 == dcn_bw_no && v->destination_line_times_for_prefetch_less_than2 == dcn_bw_no) {
return_bw         468 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	dlg_sys_param.total_flip_bw = v->return_bw - dcn_bw_max2(total_active_bw, total_prefetch_bw);
return_bw         106 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c dml_get_attr_func(return_bw, mode_lib->vba.ReturnBW);
return_bw          56 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h dml_get_attr_decl(return_bw);
return_bw         439 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float return_bw;