return_bus_width  212 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw_todcn_per_state =dcn_bw_min2(v->return_bus_width * v->dcfclk_per_state[i], v->fabric_and_dram_bandwidth_per_state[i] * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0);
return_bus_width  214 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) {
return_bus_width  215 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bus_width  217 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0);
return_bus_width  219 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bus_width  221 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw_todcn_per_state =dcn_bw_min2(v->return_bus_width * v->dcfclk_per_state[i], v->fabric_and_dram_bandwidth_per_state[i] * 1000.0);
return_bus_width  222 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) {
return_bus_width  223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bus_width  225 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0);
return_bus_width  227 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bus_width 1226 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwidth * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0);
return_bus_width 1234 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_bus_width / 4.0) {
return_bus_width 1235 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bus_width 1237 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0);
return_bus_width 1239 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bus_width 1241 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwidth * 1000.0);
return_bus_width 1242 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_bus_width / 4.0) {
return_bus_width 1243 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency)));
return_bus_width 1245 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0);
return_bus_width 1247 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2));
return_bus_width  121 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		.return_bus_width = 64, /*bytes*/
return_bus_width  787 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	v->return_bus_width = dc->dcn_soc->return_bus_width;
return_bus_width 1634 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			dc->dcn_soc->return_bus_width);
return_bus_width 1719 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	dc->dml.soc.return_bus_width_bytes = dc->dcn_soc->return_bus_width;
return_bus_width  136 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float return_bus_width;
return_bus_width  579 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	int return_bus_width; /*bytes*/