reset_counter1     38 arch/mips/oprofile/op_model_loongson2.c 	unsigned long long reset_counter1;
reset_counter1     56 arch/mips/oprofile/op_model_loongson2.c 	reg.reset_counter1 = 0;
reset_counter1     65 arch/mips/oprofile/op_model_loongson2.c 		reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
reset_counter1     89 arch/mips/oprofile/op_model_loongson2.c 	write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
reset_counter1    127 arch/mips/oprofile/op_model_loongson2.c 		counter1 = reg.reset_counter1;
reset_counter1     48 arch/mips/oprofile/op_model_loongson3.c 	unsigned long long reset_counter1;
reset_counter1     67 arch/mips/oprofile/op_model_loongson3.c 	reg.reset_counter1 = 0;
reset_counter1     78 arch/mips/oprofile/op_model_loongson3.c 		reg.reset_counter1 = 0x8000000000000000ULL - ctr[0].count;
reset_counter1    107 arch/mips/oprofile/op_model_loongson3.c 	perfcount1 = reg.reset_counter1;
reset_counter1    152 arch/mips/oprofile/op_model_loongson3.c 		counter1 = reg.reset_counter1;