res_addr 55 drivers/clk/qcom/clk-rpmh.c u32 res_addr; res_addr 78 drivers/clk/qcom/clk-rpmh.c .res_addr = _res_en_offset, \ res_addr 97 drivers/clk/qcom/clk-rpmh.c .res_addr = _res_en_offset, \ res_addr 153 drivers/clk/qcom/clk-rpmh.c cmd.addr = c->res_addr; res_addr 267 drivers/clk/qcom/clk-rpmh.c cmd.addr = c->res_addr; res_addr 423 drivers/clk/qcom/clk-rpmh.c u32 res_addr; res_addr 428 drivers/clk/qcom/clk-rpmh.c res_addr = cmd_db_read_addr(rpmh_clk->res_name); res_addr 429 drivers/clk/qcom/clk-rpmh.c if (!res_addr) { res_addr 448 drivers/clk/qcom/clk-rpmh.c rpmh_clk->res_addr += res_addr; res_addr 85 drivers/crypto/cavium/cpt/cpt_hw_types.h u64 res_addr; res_addr 521 drivers/crypto/cavium/cpt/cptvf_reqmanager.c cptinst.s.res_addr = (u64)info->comp_baddr; res_addr 46 drivers/net/can/sja1000/kvaser_pci.c void __iomem *res_addr; res_addr 192 drivers/net/can/sja1000/kvaser_pci.c pci_iounmap(board->pci_dev, board->res_addr); res_addr 200 drivers/net/can/sja1000/kvaser_pci.c void __iomem *res_addr, res_addr 222 drivers/net/can/sja1000/kvaser_pci.c board->res_addr = res_addr; res_addr 226 drivers/net/can/sja1000/kvaser_pci.c ioread8(board->res_addr + XILINX_VERINT) >> 4; res_addr 289 drivers/net/can/sja1000/kvaser_pci.c void __iomem *res_addr = NULL; res_addr 311 drivers/net/can/sja1000/kvaser_pci.c res_addr = pci_iomap(pdev, 2, PCI_PORT_XILINX_SIZE); res_addr 312 drivers/net/can/sja1000/kvaser_pci.c if (res_addr == NULL) { res_addr 331 drivers/net/can/sja1000/kvaser_pci.c conf_addr, res_addr, res_addr 352 drivers/net/can/sja1000/kvaser_pci.c if (res_addr != NULL) res_addr 353 drivers/net/can/sja1000/kvaser_pci.c pci_iounmap(pdev, res_addr); res_addr 543 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c inst.res_addr = (u64)aq->res->iova; res_addr 95 drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c inst.res_addr = (u64)aq->res->iova; res_addr 119 drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h u64 res_addr; /* W1 */ res_addr 408 drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h u64 res_addr; /* W1 */ res_addr 1250 drivers/scsi/ipr.c res->bus = cfgtew->u.cfgte->res_addr.bus; res_addr 1251 drivers/scsi/ipr.c res->target = cfgtew->u.cfgte->res_addr.target; res_addr 1252 drivers/scsi/ipr.c res->lun = cfgtew->u.cfgte->res_addr.lun; res_addr 1278 drivers/scsi/ipr.c if (res->bus == cfgtew->u.cfgte->res_addr.bus && res_addr 1279 drivers/scsi/ipr.c res->target == cfgtew->u.cfgte->res_addr.target && res_addr 1280 drivers/scsi/ipr.c res->lun == cfgtew->u.cfgte->res_addr.lun) res_addr 7447 drivers/scsi/ipr.c bus->res_addr.bus); res_addr 7506 drivers/scsi/ipr.c if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) { res_addr 7509 drivers/scsi/ipr.c IPR_GET_PHYS_LOC(bus->res_addr)); res_addr 334 drivers/scsi/ipr.h #define IPR_GET_PHYS_LOC(res_addr) \ res_addr 335 drivers/scsi/ipr.h (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun) res_addr 410 drivers/scsi/ipr.h struct ipr_res_addr res_addr; res_addr 769 drivers/scsi/ipr.h struct ipr_res_addr res_addr; res_addr 1443 drivers/scsi/ipr.h u32 res_addr; res_addr 1941 drivers/scsi/ipr.h struct ipr_res_addr *res_addr; res_addr 1950 drivers/scsi/ipr.h res_addr = &hostrcb->hcam.u.error.fd_res_addr; res_addr 1952 drivers/scsi/ipr.h if ((res_addr->bus < IPR_MAX_NUM_BUSES) && res_addr 1953 drivers/scsi/ipr.h (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1))) res_addr 355 drivers/scsi/pmcraid.h #define RES_BUS(res_addr) (le32_to_cpu(res_addr) & 0xFF) res_addr 356 drivers/scsi/pmcraid.h #define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF) res_addr 357 drivers/scsi/pmcraid.h #define RES_LUN(res_addr) 0x0