req_ctx           177 crypto/rsa-pkcs1pad.c 	struct pkcs1pad_request *req_ctx = akcipher_request_ctx(req);
req_ctx           185 crypto/rsa-pkcs1pad.c 	len = req_ctx->child_req.dst_len;
req_ctx           207 crypto/rsa-pkcs1pad.c 	kfree(req_ctx->in_buf);
req_ctx           232 crypto/rsa-pkcs1pad.c 	struct pkcs1pad_request *req_ctx = akcipher_request_ctx(req);
req_ctx           247 crypto/rsa-pkcs1pad.c 	req_ctx->in_buf = kmalloc(ctx->key_size - 1 - req->src_len,
req_ctx           249 crypto/rsa-pkcs1pad.c 	if (!req_ctx->in_buf)
req_ctx           253 crypto/rsa-pkcs1pad.c 	req_ctx->in_buf[0] = 0x02;
req_ctx           255 crypto/rsa-pkcs1pad.c 		req_ctx->in_buf[i] = 1 + prandom_u32_max(255);
req_ctx           256 crypto/rsa-pkcs1pad.c 	req_ctx->in_buf[ps_end] = 0x00;
req_ctx           258 crypto/rsa-pkcs1pad.c 	pkcs1pad_sg_set_buf(req_ctx->in_sg, req_ctx->in_buf,
req_ctx           261 crypto/rsa-pkcs1pad.c 	akcipher_request_set_tfm(&req_ctx->child_req, ctx->child);
req_ctx           262 crypto/rsa-pkcs1pad.c 	akcipher_request_set_callback(&req_ctx->child_req, req->base.flags,
req_ctx           266 crypto/rsa-pkcs1pad.c 	akcipher_request_set_crypt(&req_ctx->child_req, req_ctx->in_sg,
req_ctx           269 crypto/rsa-pkcs1pad.c 	err = crypto_akcipher_encrypt(&req_ctx->child_req);
req_ctx           280 crypto/rsa-pkcs1pad.c 	struct pkcs1pad_request *req_ctx = akcipher_request_ctx(req);
req_ctx           289 crypto/rsa-pkcs1pad.c 	dst_len = req_ctx->child_req.dst_len;
req_ctx           293 crypto/rsa-pkcs1pad.c 	out_buf = req_ctx->out_buf;
req_ctx           325 crypto/rsa-pkcs1pad.c 	kzfree(req_ctx->out_buf);
req_ctx           349 crypto/rsa-pkcs1pad.c 	struct pkcs1pad_request *req_ctx = akcipher_request_ctx(req);
req_ctx           355 crypto/rsa-pkcs1pad.c 	req_ctx->out_buf = kmalloc(ctx->key_size, GFP_KERNEL);
req_ctx           356 crypto/rsa-pkcs1pad.c 	if (!req_ctx->out_buf)
req_ctx           359 crypto/rsa-pkcs1pad.c 	pkcs1pad_sg_set_buf(req_ctx->out_sg, req_ctx->out_buf,
req_ctx           362 crypto/rsa-pkcs1pad.c 	akcipher_request_set_tfm(&req_ctx->child_req, ctx->child);
req_ctx           363 crypto/rsa-pkcs1pad.c 	akcipher_request_set_callback(&req_ctx->child_req, req->base.flags,
req_ctx           367 crypto/rsa-pkcs1pad.c 	akcipher_request_set_crypt(&req_ctx->child_req, req->src,
req_ctx           368 crypto/rsa-pkcs1pad.c 				   req_ctx->out_sg, req->src_len,
req_ctx           371 crypto/rsa-pkcs1pad.c 	err = crypto_akcipher_decrypt(&req_ctx->child_req);
req_ctx           382 crypto/rsa-pkcs1pad.c 	struct pkcs1pad_request *req_ctx = akcipher_request_ctx(req);
req_ctx           403 crypto/rsa-pkcs1pad.c 	req_ctx->in_buf = kmalloc(ctx->key_size - 1 - req->src_len,
req_ctx           405 crypto/rsa-pkcs1pad.c 	if (!req_ctx->in_buf)
req_ctx           409 crypto/rsa-pkcs1pad.c 	req_ctx->in_buf[0] = 0x01;
req_ctx           410 crypto/rsa-pkcs1pad.c 	memset(req_ctx->in_buf + 1, 0xff, ps_end - 1);
req_ctx           411 crypto/rsa-pkcs1pad.c 	req_ctx->in_buf[ps_end] = 0x00;
req_ctx           414 crypto/rsa-pkcs1pad.c 		memcpy(req_ctx->in_buf + ps_end + 1, digest_info->data,
req_ctx           417 crypto/rsa-pkcs1pad.c 	pkcs1pad_sg_set_buf(req_ctx->in_sg, req_ctx->in_buf,
req_ctx           420 crypto/rsa-pkcs1pad.c 	akcipher_request_set_tfm(&req_ctx->child_req, ctx->child);
req_ctx           421 crypto/rsa-pkcs1pad.c 	akcipher_request_set_callback(&req_ctx->child_req, req->base.flags,
req_ctx           425 crypto/rsa-pkcs1pad.c 	akcipher_request_set_crypt(&req_ctx->child_req, req_ctx->in_sg,
req_ctx           428 crypto/rsa-pkcs1pad.c 	err = crypto_akcipher_decrypt(&req_ctx->child_req);
req_ctx           439 crypto/rsa-pkcs1pad.c 	struct pkcs1pad_request *req_ctx = akcipher_request_ctx(req);
req_ctx           451 crypto/rsa-pkcs1pad.c 	dst_len = req_ctx->child_req.dst_len;
req_ctx           455 crypto/rsa-pkcs1pad.c 	out_buf = req_ctx->out_buf;
req_ctx           496 crypto/rsa-pkcs1pad.c 			   req_ctx->out_buf + ctx->key_size,
req_ctx           499 crypto/rsa-pkcs1pad.c 	if (memcmp(req_ctx->out_buf + ctx->key_size, out_buf + pos,
req_ctx           503 crypto/rsa-pkcs1pad.c 	kzfree(req_ctx->out_buf);
req_ctx           535 crypto/rsa-pkcs1pad.c 	struct pkcs1pad_request *req_ctx = akcipher_request_ctx(req);
req_ctx           543 crypto/rsa-pkcs1pad.c 	req_ctx->out_buf = kmalloc(ctx->key_size + req->dst_len, GFP_KERNEL);
req_ctx           544 crypto/rsa-pkcs1pad.c 	if (!req_ctx->out_buf)
req_ctx           547 crypto/rsa-pkcs1pad.c 	pkcs1pad_sg_set_buf(req_ctx->out_sg, req_ctx->out_buf,
req_ctx           550 crypto/rsa-pkcs1pad.c 	akcipher_request_set_tfm(&req_ctx->child_req, ctx->child);
req_ctx           551 crypto/rsa-pkcs1pad.c 	akcipher_request_set_callback(&req_ctx->child_req, req->base.flags,
req_ctx           555 crypto/rsa-pkcs1pad.c 	akcipher_request_set_crypt(&req_ctx->child_req, req->src,
req_ctx           556 crypto/rsa-pkcs1pad.c 				   req_ctx->out_sg, req->src_len,
req_ctx           559 crypto/rsa-pkcs1pad.c 	err = crypto_akcipher_encrypt(&req_ctx->child_req);
req_ctx          1089 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_request_context *req_ctx = NULL;
req_ctx          1093 drivers/crypto/axis/artpec6_crypto.c 	req_ctx = skcipher_request_ctx(req);
req_ctx          1099 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->decrypt = 0;
req_ctx          1114 drivers/crypto/axis/artpec6_crypto.c 	ret = artpec6_crypto_common_init(&req_ctx->common,
req_ctx          1123 drivers/crypto/axis/artpec6_crypto.c 		artpec6_crypto_common_destroy(&req_ctx->common);
req_ctx          1127 drivers/crypto/axis/artpec6_crypto.c 	return artpec6_crypto_submit(&req_ctx->common);
req_ctx          1135 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_request_context *req_ctx = NULL;
req_ctx          1138 drivers/crypto/axis/artpec6_crypto.c 	req_ctx = skcipher_request_ctx(req);
req_ctx          1144 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->decrypt = 1;
req_ctx          1160 drivers/crypto/axis/artpec6_crypto.c 	ret = artpec6_crypto_common_init(&req_ctx->common, &req->base,
req_ctx          1168 drivers/crypto/axis/artpec6_crypto.c 		artpec6_crypto_common_destroy(&req_ctx->common);
req_ctx          1172 drivers/crypto/axis/artpec6_crypto.c 	return artpec6_crypto_submit(&req_ctx->common);
req_ctx          1266 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1268 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->decrypt = false;
req_ctx          1269 drivers/crypto/axis/artpec6_crypto.c 	ret = artpec6_crypto_common_init(&req_ctx->common, &req->base,
req_ctx          1277 drivers/crypto/axis/artpec6_crypto.c 		artpec6_crypto_common_destroy(&req_ctx->common);
req_ctx          1281 drivers/crypto/axis/artpec6_crypto.c 	return artpec6_crypto_submit(&req_ctx->common);
req_ctx          1287 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1289 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->decrypt = true;
req_ctx          1293 drivers/crypto/axis/artpec6_crypto.c 	ret = artpec6_crypto_common_init(&req_ctx->common,
req_ctx          1302 drivers/crypto/axis/artpec6_crypto.c 		artpec6_crypto_common_destroy(&req_ctx->common);
req_ctx          1306 drivers/crypto/axis/artpec6_crypto.c 	return artpec6_crypto_submit(&req_ctx->common);
req_ctx          1312 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(areq);
req_ctx          1317 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_req_common *common = &req_ctx->common;
req_ctx          1328 drivers/crypto/axis/artpec6_crypto.c 	if (req_ctx->hash_flags & HASH_FLAG_HMAC) {
req_ctx          1330 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->key_md = FIELD_PREP(A6_CRY_MD_OPER,
req_ctx          1333 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->key_md = FIELD_PREP(A7_CRY_MD_OPER,
req_ctx          1338 drivers/crypto/axis/artpec6_crypto.c 		memcpy(req_ctx->key_buffer, ctx->hmac_key,
req_ctx          1340 drivers/crypto/axis/artpec6_crypto.c 		memset(req_ctx->key_buffer + ctx->hmac_key_length, 0,
req_ctx          1344 drivers/crypto/axis/artpec6_crypto.c 					(void *)&req_ctx->key_md,
req_ctx          1345 drivers/crypto/axis/artpec6_crypto.c 					sizeof(req_ctx->key_md), false, false);
req_ctx          1350 drivers/crypto/axis/artpec6_crypto.c 					req_ctx->key_buffer, blocksize,
req_ctx          1356 drivers/crypto/axis/artpec6_crypto.c 	if (!(req_ctx->hash_flags & HASH_FLAG_INIT_CTX)) {
req_ctx          1365 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_md &= ~A6_CRY_MD_HASH_SEL_CTX;
req_ctx          1366 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_md |= FIELD_PREP(A6_CRY_MD_HASH_SEL_CTX, sel_ctx);
req_ctx          1369 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->hash_flags & HASH_FLAG_FINALIZE)
req_ctx          1370 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->hash_md |= A6_CRY_MD_HASH_HMAC_FIN;
req_ctx          1372 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_md &= ~A7_CRY_MD_HASH_SEL_CTX;
req_ctx          1373 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_md |= FIELD_PREP(A7_CRY_MD_HASH_SEL_CTX, sel_ctx);
req_ctx          1376 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->hash_flags & HASH_FLAG_FINALIZE)
req_ctx          1377 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->hash_md |= A7_CRY_MD_HASH_HMAC_FIN;
req_ctx          1382 drivers/crypto/axis/artpec6_crypto.c 				(void *)&req_ctx->hash_md,
req_ctx          1383 drivers/crypto/axis/artpec6_crypto.c 				sizeof(req_ctx->hash_md), false, false);
req_ctx          1393 drivers/crypto/axis/artpec6_crypto.c 					req_ctx->digeststate,
req_ctx          1400 drivers/crypto/axis/artpec6_crypto.c 	if (req_ctx->hash_flags & HASH_FLAG_UPDATE) {
req_ctx          1402 drivers/crypto/axis/artpec6_crypto.c 		size_t total_bytes = areq->nbytes + req_ctx->partial_bytes;
req_ctx          1407 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->partial_bytes && ready_bytes) {
req_ctx          1412 drivers/crypto/axis/artpec6_crypto.c 			memcpy(req_ctx->partial_buffer_out,
req_ctx          1413 drivers/crypto/axis/artpec6_crypto.c 				req_ctx->partial_buffer,
req_ctx          1414 drivers/crypto/axis/artpec6_crypto.c 				req_ctx->partial_bytes);
req_ctx          1417 drivers/crypto/axis/artpec6_crypto.c 						req_ctx->partial_buffer_out,
req_ctx          1418 drivers/crypto/axis/artpec6_crypto.c 						req_ctx->partial_bytes,
req_ctx          1424 drivers/crypto/axis/artpec6_crypto.c 			done_bytes += req_ctx->partial_bytes;
req_ctx          1425 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->partial_bytes = 0;
req_ctx          1441 drivers/crypto/axis/artpec6_crypto.c 					   req_ctx->partial_buffer +
req_ctx          1442 drivers/crypto/axis/artpec6_crypto.c 					   req_ctx->partial_bytes,
req_ctx          1445 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->partial_bytes += sg_rem;
req_ctx          1448 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->digcnt += ready_bytes;
req_ctx          1449 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_flags &= ~(HASH_FLAG_UPDATE);
req_ctx          1453 drivers/crypto/axis/artpec6_crypto.c 	if (req_ctx->hash_flags & HASH_FLAG_FINALIZE) {
req_ctx          1459 drivers/crypto/axis/artpec6_crypto.c 			oper = FIELD_GET(A6_CRY_MD_OPER, req_ctx->hash_md);
req_ctx          1461 drivers/crypto/axis/artpec6_crypto.c 			oper = FIELD_GET(A7_CRY_MD_OPER, req_ctx->hash_md);
req_ctx          1464 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->partial_bytes) {
req_ctx          1465 drivers/crypto/axis/artpec6_crypto.c 			memcpy(req_ctx->partial_buffer_out,
req_ctx          1466 drivers/crypto/axis/artpec6_crypto.c 			       req_ctx->partial_buffer,
req_ctx          1467 drivers/crypto/axis/artpec6_crypto.c 			       req_ctx->partial_bytes);
req_ctx          1469 drivers/crypto/axis/artpec6_crypto.c 						req_ctx->partial_buffer_out,
req_ctx          1470 drivers/crypto/axis/artpec6_crypto.c 						req_ctx->partial_bytes,
req_ctx          1475 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->digcnt += req_ctx->partial_bytes;
req_ctx          1476 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->partial_bytes = 0;
req_ctx          1479 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->hash_flags & HASH_FLAG_HMAC)
req_ctx          1480 drivers/crypto/axis/artpec6_crypto.c 			digest_bits = 8 * (req_ctx->digcnt + blocksize);
req_ctx          1482 drivers/crypto/axis/artpec6_crypto.c 			digest_bits = 8 * req_ctx->digcnt;
req_ctx          1485 drivers/crypto/axis/artpec6_crypto.c 		hash_pad_len = create_hash_pad(oper, req_ctx->pad_buffer,
req_ctx          1486 drivers/crypto/axis/artpec6_crypto.c 					       req_ctx->digcnt, digest_bits);
req_ctx          1488 drivers/crypto/axis/artpec6_crypto.c 						      req_ctx->pad_buffer,
req_ctx          1491 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->digcnt = 0;
req_ctx          1509 drivers/crypto/axis/artpec6_crypto.c 						      req_ctx->digeststate,
req_ctx          1516 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hash_flags &= ~(HASH_FLAG_INIT_CTX | HASH_FLAG_UPDATE |
req_ctx          1671 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_request_context *req_ctx = NULL;
req_ctx          1681 drivers/crypto/axis/artpec6_crypto.c 	req_ctx = skcipher_request_ctx(areq);
req_ctx          1682 drivers/crypto/axis/artpec6_crypto.c 	common = &req_ctx->common;
req_ctx          1701 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->cipher_md = 0;
req_ctx          1728 drivers/crypto/axis/artpec6_crypto.c 		cipher_decr = req_ctx->decrypt;
req_ctx          1733 drivers/crypto/axis/artpec6_crypto.c 		cipher_decr = req_ctx->decrypt;
req_ctx          1743 drivers/crypto/axis/artpec6_crypto.c 		cipher_decr = req_ctx->decrypt;
req_ctx          1746 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->cipher_md |= A6_CRY_MD_CIPHER_DSEQ;
req_ctx          1748 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->cipher_md |= A7_CRY_MD_CIPHER_DSEQ;
req_ctx          1758 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_OPER, oper);
req_ctx          1759 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_CIPHER_LEN,
req_ctx          1762 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->cipher_md |= A6_CRY_MD_CIPHER_DECR;
req_ctx          1764 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_OPER, oper);
req_ctx          1765 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_CIPHER_LEN,
req_ctx          1768 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->cipher_md |= A7_CRY_MD_CIPHER_DECR;
req_ctx          1772 drivers/crypto/axis/artpec6_crypto.c 					    &req_ctx->cipher_md,
req_ctx          1773 drivers/crypto/axis/artpec6_crypto.c 					    sizeof(req_ctx->cipher_md),
req_ctx          1838 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_aead_req_ctx *req_ctx = aead_request_ctx(areq);
req_ctx          1840 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_req_common *common = &req_ctx->common;
req_ctx          1865 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->cipher_md = 0;
req_ctx          1882 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_OPER,
req_ctx          1884 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_CIPHER_LEN,
req_ctx          1886 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->decrypt)
req_ctx          1887 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->cipher_md |= A6_CRY_MD_CIPHER_DECR;
req_ctx          1889 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_OPER,
req_ctx          1891 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_CIPHER_LEN,
req_ctx          1893 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->decrypt)
req_ctx          1894 drivers/crypto/axis/artpec6_crypto.c 			req_ctx->cipher_md |= A7_CRY_MD_CIPHER_DECR;
req_ctx          1898 drivers/crypto/axis/artpec6_crypto.c 					    (void *) &req_ctx->cipher_md,
req_ctx          1899 drivers/crypto/axis/artpec6_crypto.c 					    sizeof(req_ctx->cipher_md), false,
req_ctx          1910 drivers/crypto/axis/artpec6_crypto.c 	if (req_ctx->decrypt)
req_ctx          1914 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hw_ctx.aad_length_bits =
req_ctx          1917 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hw_ctx.text_length_bits =
req_ctx          1920 drivers/crypto/axis/artpec6_crypto.c 	memcpy(req_ctx->hw_ctx.J0, areq->iv, crypto_aead_ivsize(cipher));
req_ctx          1922 drivers/crypto/axis/artpec6_crypto.c 	memcpy(req_ctx->hw_ctx.J0 + GCM_AES_IV_SIZE, "\x00\x00\x00\x01", 4);
req_ctx          1924 drivers/crypto/axis/artpec6_crypto.c 	ret = artpec6_crypto_setup_out_descr(common, &req_ctx->hw_ctx,
req_ctx          1975 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->decrypt)
req_ctx          2006 drivers/crypto/axis/artpec6_crypto.c 		if (req_ctx->decrypt) {
req_ctx          2008 drivers/crypto/axis/artpec6_crypto.c 				req_ctx->decryption_tag, AES_BLOCK_SIZE, false);
req_ctx          2192 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_crypto_aead_req_ctx *req_ctx = aead_request_ctx(areq);
req_ctx          2194 drivers/crypto/axis/artpec6_crypto.c 	if (req_ctx->decrypt) {
req_ctx          2205 drivers/crypto/axis/artpec6_crypto.c 		if (crypto_memneq(req_ctx->decryption_tag,
req_ctx          2212 drivers/crypto/axis/artpec6_crypto.c 					     req_ctx->decryption_tag,
req_ctx          2271 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(req);
req_ctx          2274 drivers/crypto/axis/artpec6_crypto.c 	memset(req_ctx, 0, sizeof(*req_ctx));
req_ctx          2276 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hash_flags = HASH_FLAG_INIT_CTX;
req_ctx          2278 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_flags |= (HASH_FLAG_HMAC | HASH_FLAG_UPDATE_KEY);
req_ctx          2293 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_md = FIELD_PREP(A6_CRY_MD_OPER, oper);
req_ctx          2295 drivers/crypto/axis/artpec6_crypto.c 		req_ctx->hash_md = FIELD_PREP(A7_CRY_MD_OPER, oper);
req_ctx          2302 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(req);
req_ctx          2305 drivers/crypto/axis/artpec6_crypto.c 	if (!req_ctx->common.dma) {
req_ctx          2306 drivers/crypto/axis/artpec6_crypto.c 		ret = artpec6_crypto_common_init(&req_ctx->common,
req_ctx          2318 drivers/crypto/axis/artpec6_crypto.c 		ret = artpec6_crypto_submit(&req_ctx->common);
req_ctx          2326 drivers/crypto/axis/artpec6_crypto.c 		artpec6_crypto_common_destroy(&req_ctx->common);
req_ctx          2335 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(req);
req_ctx          2337 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hash_flags |= HASH_FLAG_FINALIZE;
req_ctx          2344 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(req);
req_ctx          2346 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hash_flags |= HASH_FLAG_UPDATE;
req_ctx          2358 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(req);
req_ctx          2362 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hash_flags |= HASH_FLAG_UPDATE | HASH_FLAG_FINALIZE;
req_ctx          2374 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(req);
req_ctx          2377 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hash_flags |= HASH_FLAG_UPDATE | HASH_FLAG_FINALIZE;
req_ctx          2389 drivers/crypto/axis/artpec6_crypto.c 	struct artpec6_hash_request_context *req_ctx = ahash_request_ctx(req);
req_ctx          2392 drivers/crypto/axis/artpec6_crypto.c 	req_ctx->hash_flags |= HASH_FLAG_UPDATE | HASH_FLAG_FINALIZE;
req_ctx           351 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = aead_request_ctx(req);
req_ctx           352 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx           353 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx           548 drivers/crypto/caam/caamalg_qi2.c 	memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          1119 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = skcipher_request_ctx(req);
req_ctx          1120 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          1121 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          1245 drivers/crypto/caam/caamalg_qi2.c 	memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          1293 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = to_caam_req(areq);
req_ctx          1294 drivers/crypto/caam/caamalg_qi2.c 	struct aead_edesc *edesc = req_ctx->edesc;
req_ctx          1314 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = to_caam_req(areq);
req_ctx          1315 drivers/crypto/caam/caamalg_qi2.c 	struct aead_edesc *edesc = req_ctx->edesc;
req_ctx          1400 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = to_caam_req(areq);
req_ctx          1403 drivers/crypto/caam/caamalg_qi2.c 	struct skcipher_edesc *edesc = req_ctx->edesc;
req_ctx          1438 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = to_caam_req(areq);
req_ctx          1441 drivers/crypto/caam/caamalg_qi2.c 	struct skcipher_edesc *edesc = req_ctx->edesc;
req_ctx          3166 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx;
req_ctx          3175 drivers/crypto/caam/caamalg_qi2.c 	req_ctx = kzalloc(sizeof(*req_ctx), GFP_KERNEL | GFP_DMA);
req_ctx          3176 drivers/crypto/caam/caamalg_qi2.c 	if (!req_ctx)
req_ctx          3179 drivers/crypto/caam/caamalg_qi2.c 	in_fle = &req_ctx->fd_flt[1];
req_ctx          3180 drivers/crypto/caam/caamalg_qi2.c 	out_fle = &req_ctx->fd_flt[0];
req_ctx          3230 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc = flc;
req_ctx          3231 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc_dma = flc_dma;
req_ctx          3232 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->cbk = split_key_sh_done;
req_ctx          3233 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->ctx = &result;
req_ctx          3235 drivers/crypto/caam/caamalg_qi2.c 	ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          3252 drivers/crypto/caam/caamalg_qi2.c 	kfree(req_ctx);
req_ctx          3462 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          3463 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          3464 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          3545 drivers/crypto/caam/caamalg_qi2.c 		memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          3554 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->flc = &ctx->flc[UPDATE];
req_ctx          3555 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->flc_dma = ctx->flc_dma[UPDATE];
req_ctx          3556 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->cbk = ahash_done_bi;
req_ctx          3557 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->ctx = &req->base;
req_ctx          3558 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->edesc = edesc;
req_ctx          3560 drivers/crypto/caam/caamalg_qi2.c 		ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          3590 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          3591 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          3592 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          3630 drivers/crypto/caam/caamalg_qi2.c 	memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          3639 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc = &ctx->flc[FINALIZE];
req_ctx          3640 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc_dma = ctx->flc_dma[FINALIZE];
req_ctx          3641 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->cbk = ahash_done_ctx_src;
req_ctx          3642 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->ctx = &req->base;
req_ctx          3643 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->edesc = edesc;
req_ctx          3645 drivers/crypto/caam/caamalg_qi2.c 	ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          3661 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          3662 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          3663 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          3724 drivers/crypto/caam/caamalg_qi2.c 	memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          3733 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc = &ctx->flc[FINALIZE];
req_ctx          3734 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc_dma = ctx->flc_dma[FINALIZE];
req_ctx          3735 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->cbk = ahash_done_ctx_src;
req_ctx          3736 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->ctx = &req->base;
req_ctx          3737 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->edesc = edesc;
req_ctx          3739 drivers/crypto/caam/caamalg_qi2.c 	ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          3755 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          3756 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          3757 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          3792 drivers/crypto/caam/caamalg_qi2.c 	memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          3829 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc = &ctx->flc[DIGEST];
req_ctx          3830 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc_dma = ctx->flc_dma[DIGEST];
req_ctx          3831 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->cbk = ahash_done;
req_ctx          3832 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->ctx = &req->base;
req_ctx          3833 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->edesc = edesc;
req_ctx          3834 drivers/crypto/caam/caamalg_qi2.c 	ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          3850 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          3851 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          3852 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          3884 drivers/crypto/caam/caamalg_qi2.c 	memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          3901 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc = &ctx->flc[DIGEST];
req_ctx          3902 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc_dma = ctx->flc_dma[DIGEST];
req_ctx          3903 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->cbk = ahash_done;
req_ctx          3904 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->ctx = &req->base;
req_ctx          3905 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->edesc = edesc;
req_ctx          3907 drivers/crypto/caam/caamalg_qi2.c 	ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          3923 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          3924 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          3925 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          4004 drivers/crypto/caam/caamalg_qi2.c 		memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          4013 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->flc = &ctx->flc[UPDATE_FIRST];
req_ctx          4014 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->flc_dma = ctx->flc_dma[UPDATE_FIRST];
req_ctx          4015 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->cbk = ahash_done_ctx_dst;
req_ctx          4016 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->ctx = &req->base;
req_ctx          4017 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->edesc = edesc;
req_ctx          4019 drivers/crypto/caam/caamalg_qi2.c 		ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          4053 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          4054 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          4055 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          4118 drivers/crypto/caam/caamalg_qi2.c 	memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          4127 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc = &ctx->flc[DIGEST];
req_ctx          4128 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->flc_dma = ctx->flc_dma[DIGEST];
req_ctx          4129 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->cbk = ahash_done;
req_ctx          4130 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->ctx = &req->base;
req_ctx          4131 drivers/crypto/caam/caamalg_qi2.c 	req_ctx->edesc = edesc;
req_ctx          4132 drivers/crypto/caam/caamalg_qi2.c 	ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx          4149 drivers/crypto/caam/caamalg_qi2.c 	struct caam_request *req_ctx = &state->caam_req;
req_ctx          4150 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1];
req_ctx          4151 drivers/crypto/caam/caamalg_qi2.c 	struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0];
req_ctx          4197 drivers/crypto/caam/caamalg_qi2.c 		memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
req_ctx          4241 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->flc = &ctx->flc[UPDATE_FIRST];
req_ctx          4242 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->flc_dma = ctx->flc_dma[UPDATE_FIRST];
req_ctx          4243 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->cbk = ahash_done_ctx_dst;
req_ctx          4244 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->ctx = &req->base;
req_ctx          4245 drivers/crypto/caam/caamalg_qi2.c 		req_ctx->edesc = edesc;
req_ctx          4247 drivers/crypto/caam/caamalg_qi2.c 		ret = dpaa2_caam_enqueue(ctx->dev, req_ctx);
req_ctx            46 drivers/crypto/caam/caampkc.c 	struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
req_ctx            49 drivers/crypto/caam/caampkc.c 	dma_unmap_sg(dev, req_ctx->fixup_src, edesc->src_nents, DMA_TO_DEVICE);
req_ctx           249 drivers/crypto/caam/caampkc.c 	struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
req_ctx           271 drivers/crypto/caam/caampkc.c 		req_ctx->fixup_src = scatterwalk_ffwd(req_ctx->src, req->src,
req_ctx           273 drivers/crypto/caam/caampkc.c 		req_ctx->fixup_src_len = req->src_len - lzeros;
req_ctx           280 drivers/crypto/caam/caampkc.c 		req_ctx->fixup_src = req->src;
req_ctx           281 drivers/crypto/caam/caampkc.c 		req_ctx->fixup_src_len = req->src_len;
req_ctx           284 drivers/crypto/caam/caampkc.c 	src_nents = sg_nents_for_len(req_ctx->fixup_src,
req_ctx           285 drivers/crypto/caam/caampkc.c 				     req_ctx->fixup_src_len);
req_ctx           306 drivers/crypto/caam/caampkc.c 	sgc = dma_map_sg(dev, req_ctx->fixup_src, src_nents, DMA_TO_DEVICE);
req_ctx           324 drivers/crypto/caam/caampkc.c 		sg_to_sec4_sg_last(req_ctx->fixup_src, req_ctx->fixup_src_len,
req_ctx           356 drivers/crypto/caam/caampkc.c 	dma_unmap_sg(dev, req_ctx->fixup_src, src_nents, DMA_TO_DEVICE);
req_ctx           366 drivers/crypto/caam/caampkc.c 	struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
req_ctx           391 drivers/crypto/caam/caampkc.c 		pdb->f_dma = sg_dma_address(req_ctx->fixup_src);
req_ctx           403 drivers/crypto/caam/caampkc.c 	pdb->f_len = req_ctx->fixup_src_len;
req_ctx           436 drivers/crypto/caam/caampkc.c 		struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
req_ctx           438 drivers/crypto/caam/caampkc.c 		pdb->g_dma = sg_dma_address(req_ctx->fixup_src);
req_ctx           501 drivers/crypto/caam/caampkc.c 		struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
req_ctx           503 drivers/crypto/caam/caampkc.c 		pdb->g_dma = sg_dma_address(req_ctx->fixup_src);
req_ctx           590 drivers/crypto/caam/caampkc.c 		struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
req_ctx           592 drivers/crypto/caam/caampkc.c 		pdb->g_dma = sg_dma_address(req_ctx->fixup_src);
req_ctx           886 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx           890 drivers/crypto/ccree/cc_aead.c 	int direct = req_ctx->gen_ctx.op_type;
req_ctx           897 drivers/crypto/ccree/cc_aead.c 		set_dout_dlli(&desc[idx], req_ctx->icv_dma_addr, ctx->authsize,
req_ctx           913 drivers/crypto/ccree/cc_aead.c 		set_dout_dlli(&desc[idx], req_ctx->mac_buf_dma_addr,
req_ctx           936 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx           937 drivers/crypto/ccree/cc_aead.c 	unsigned int hw_iv_size = req_ctx->hw_iv_size;
req_ctx           939 drivers/crypto/ccree/cc_aead.c 	int direct = req_ctx->gen_ctx.op_type;
req_ctx           945 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->gen_ctx.iv_dma_addr,
req_ctx           978 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx           979 drivers/crypto/ccree/cc_aead.c 	int direct = req_ctx->gen_ctx.op_type;
req_ctx           982 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->cryptlen == 0)
req_ctx          1171 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1176 drivers/crypto/ccree/cc_aead.c 	if ((req_ctx->assoc_buff_type == CC_DMA_BUF_MLLI ||
req_ctx          1177 drivers/crypto/ccree/cc_aead.c 	    req_ctx->data_buff_type == CC_DMA_BUF_MLLI ||
req_ctx          1178 drivers/crypto/ccree/cc_aead.c 	    !req_ctx->is_single_pass) && req_ctx->mlli_params.mlli_len) {
req_ctx          1181 drivers/crypto/ccree/cc_aead.c 			req_ctx->mlli_params.mlli_len);
req_ctx          1185 drivers/crypto/ccree/cc_aead.c 			     req_ctx->mlli_params.mlli_dma_addr,
req_ctx          1186 drivers/crypto/ccree/cc_aead.c 			     req_ctx->mlli_params.mlli_len, NS_BIT);
req_ctx          1189 drivers/crypto/ccree/cc_aead.c 			      req_ctx->mlli_params.mlli_len);
req_ctx          1225 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1226 drivers/crypto/ccree/cc_aead.c 	int direct = req_ctx->gen_ctx.op_type;
req_ctx          1229 drivers/crypto/ccree/cc_aead.c 				 req_ctx->is_single_pass);
req_ctx          1231 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->is_single_pass) {
req_ctx          1278 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1279 drivers/crypto/ccree/cc_aead.c 	int direct = req_ctx->gen_ctx.op_type;
req_ctx          1282 drivers/crypto/ccree/cc_aead.c 				 req_ctx->is_single_pass);
req_ctx          1284 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->is_single_pass) {
req_ctx          1424 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1429 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) {
req_ctx          1431 drivers/crypto/ccree/cc_aead.c 		mac_result = req_ctx->mac_buf_dma_addr;
req_ctx          1434 drivers/crypto/ccree/cc_aead.c 		mac_result = req_ctx->icv_dma_addr;
req_ctx          1454 drivers/crypto/ccree/cc_aead.c 		     req_ctx->gen_ctx.iv_dma_addr, AES_BLOCK_SIZE, NS_BIT);
req_ctx          1477 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->mac_buf_dma_addr,
req_ctx          1486 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->assoclen > 0) {
req_ctx          1491 drivers/crypto/ccree/cc_aead.c 			     sg_dma_address(&req_ctx->ccm_adata_sg),
req_ctx          1492 drivers/crypto/ccree/cc_aead.c 			     AES_BLOCK_SIZE + req_ctx->ccm_hdr_size, NS_BIT);
req_ctx          1498 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->cryptlen)
req_ctx          1504 drivers/crypto/ccree/cc_aead.c 	set_dout_dlli(&desc[idx], req_ctx->mac_buf_dma_addr, ctx->authsize,
req_ctx          1516 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->ccm_iv0_dma_addr,
req_ctx          1530 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->mac_buf_dma_addr,
req_ctx          1546 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1554 drivers/crypto/ccree/cc_aead.c 	u8 *b0 = req_ctx->ccm_config + CCM_B0_OFFSET;
req_ctx          1555 drivers/crypto/ccree/cc_aead.c 	u8 *a0 = req_ctx->ccm_config + CCM_A0_OFFSET;
req_ctx          1556 drivers/crypto/ccree/cc_aead.c 	u8 *ctr_count_0 = req_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET;
req_ctx          1557 drivers/crypto/ccree/cc_aead.c 	unsigned int cryptlen = (req_ctx->gen_ctx.op_type ==
req_ctx          1563 drivers/crypto/ccree/cc_aead.c 	memset(req_ctx->mac_buf, 0, AES_BLOCK_SIZE);
req_ctx          1564 drivers/crypto/ccree/cc_aead.c 	memset(req_ctx->ccm_config, 0, AES_BLOCK_SIZE * 3);
req_ctx          1578 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->assoclen > 0)
req_ctx          1589 drivers/crypto/ccree/cc_aead.c 	req_ctx->ccm_hdr_size = format_ccm_a0(a0, req_ctx->assoclen);
req_ctx          1629 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1646 drivers/crypto/ccree/cc_aead.c 	set_dout_dlli(&desc[idx], req_ctx->hkey_dma_addr, AES_BLOCK_SIZE,
req_ctx          1659 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->hkey_dma_addr,
req_ctx          1707 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1721 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->cryptlen && !req_ctx->plaintext_authenticate_only) {
req_ctx          1727 drivers/crypto/ccree/cc_aead.c 			     req_ctx->gcm_iv_inc2_dma_addr, AES_BLOCK_SIZE,
req_ctx          1744 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1748 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) {
req_ctx          1749 drivers/crypto/ccree/cc_aead.c 		mac_result = req_ctx->mac_buf_dma_addr;
req_ctx          1751 drivers/crypto/ccree/cc_aead.c 		mac_result = req_ctx->icv_dma_addr;
req_ctx          1756 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->gcm_block_len_dma_addr,
req_ctx          1765 drivers/crypto/ccree/cc_aead.c 	set_dout_dlli(&desc[idx], req_ctx->mac_buf_dma_addr, AES_BLOCK_SIZE,
req_ctx          1777 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->gcm_iv_inc1_dma_addr,
req_ctx          1793 drivers/crypto/ccree/cc_aead.c 	set_din_type(&desc[idx], DMA_DLLI, req_ctx->mac_buf_dma_addr,
req_ctx          1806 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1809 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) {
req_ctx          1816 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->plaintext_authenticate_only) {
req_ctx          1829 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->assoclen > 0)
req_ctx          1833 drivers/crypto/ccree/cc_aead.c 	if (req_ctx->cryptlen)
req_ctx          1844 drivers/crypto/ccree/cc_aead.c 	struct aead_req_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1847 drivers/crypto/ccree/cc_aead.c 	unsigned int cryptlen = (req_ctx->gen_ctx.op_type ==
req_ctx          1854 drivers/crypto/ccree/cc_aead.c 		__func__, cryptlen, req_ctx->assoclen, ctx->authsize);
req_ctx          1856 drivers/crypto/ccree/cc_aead.c 	memset(req_ctx->hkey, 0, AES_BLOCK_SIZE);
req_ctx          1858 drivers/crypto/ccree/cc_aead.c 	memset(req_ctx->mac_buf, 0, AES_BLOCK_SIZE);
req_ctx          1861 drivers/crypto/ccree/cc_aead.c 	memcpy(req_ctx->gcm_iv_inc2, req->iv, 16);
req_ctx          1865 drivers/crypto/ccree/cc_aead.c 	memcpy(req_ctx->gcm_iv_inc1, req->iv, 16);
req_ctx          1867 drivers/crypto/ccree/cc_aead.c 	if (!req_ctx->plaintext_authenticate_only) {
req_ctx          1870 drivers/crypto/ccree/cc_aead.c 		temp64 = cpu_to_be64(req_ctx->assoclen * 8);
req_ctx          1871 drivers/crypto/ccree/cc_aead.c 		memcpy(&req_ctx->gcm_len_block.len_a, &temp64, sizeof(temp64));
req_ctx          1873 drivers/crypto/ccree/cc_aead.c 		memcpy(&req_ctx->gcm_len_block.len_c, &temp64, 8);
req_ctx          1880 drivers/crypto/ccree/cc_aead.c 		temp64 = cpu_to_be64((req_ctx->assoclen +
req_ctx          1882 drivers/crypto/ccree/cc_aead.c 		memcpy(&req_ctx->gcm_len_block.len_a, &temp64, sizeof(temp64));
req_ctx          1884 drivers/crypto/ccree/cc_aead.c 		memcpy(&req_ctx->gcm_len_block.len_c, &temp64, 8);
req_ctx           373 drivers/crypto/ccree/cc_buffer_mgr.c 	struct cipher_req_ctx *req_ctx = (struct cipher_req_ctx *)ctx;
req_ctx           375 drivers/crypto/ccree/cc_buffer_mgr.c 	if (req_ctx->gen_ctx.iv_dma_addr) {
req_ctx           377 drivers/crypto/ccree/cc_buffer_mgr.c 			&req_ctx->gen_ctx.iv_dma_addr, ivsize);
req_ctx           378 drivers/crypto/ccree/cc_buffer_mgr.c 		dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr,
req_ctx           382 drivers/crypto/ccree/cc_buffer_mgr.c 	if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI &&
req_ctx           383 drivers/crypto/ccree/cc_buffer_mgr.c 	    req_ctx->mlli_params.mlli_virt_addr) {
req_ctx           384 drivers/crypto/ccree/cc_buffer_mgr.c 		dma_pool_free(req_ctx->mlli_params.curr_pool,
req_ctx           385 drivers/crypto/ccree/cc_buffer_mgr.c 			      req_ctx->mlli_params.mlli_virt_addr,
req_ctx           386 drivers/crypto/ccree/cc_buffer_mgr.c 			      req_ctx->mlli_params.mlli_dma_addr);
req_ctx           389 drivers/crypto/ccree/cc_buffer_mgr.c 	dma_unmap_sg(dev, src, req_ctx->in_nents, DMA_BIDIRECTIONAL);
req_ctx           393 drivers/crypto/ccree/cc_buffer_mgr.c 		dma_unmap_sg(dev, dst, req_ctx->out_nents, DMA_BIDIRECTIONAL);
req_ctx           403 drivers/crypto/ccree/cc_buffer_mgr.c 	struct cipher_req_ctx *req_ctx = (struct cipher_req_ctx *)ctx;
req_ctx           404 drivers/crypto/ccree/cc_buffer_mgr.c 	struct mlli_params *mlli_params = &req_ctx->mlli_params;
req_ctx           412 drivers/crypto/ccree/cc_buffer_mgr.c 	req_ctx->dma_buf_type = CC_DMA_BUF_DLLI;
req_ctx           419 drivers/crypto/ccree/cc_buffer_mgr.c 		req_ctx->gen_ctx.iv_dma_addr =
req_ctx           422 drivers/crypto/ccree/cc_buffer_mgr.c 		if (dma_mapping_error(dev, req_ctx->gen_ctx.iv_dma_addr)) {
req_ctx           428 drivers/crypto/ccree/cc_buffer_mgr.c 			ivsize, info, &req_ctx->gen_ctx.iv_dma_addr);
req_ctx           430 drivers/crypto/ccree/cc_buffer_mgr.c 		req_ctx->gen_ctx.iv_dma_addr = 0;
req_ctx           434 drivers/crypto/ccree/cc_buffer_mgr.c 	rc = cc_map_sg(dev, src, nbytes, DMA_BIDIRECTIONAL, &req_ctx->in_nents,
req_ctx           439 drivers/crypto/ccree/cc_buffer_mgr.c 		req_ctx->dma_buf_type = CC_DMA_BUF_MLLI;
req_ctx           443 drivers/crypto/ccree/cc_buffer_mgr.c 		if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
req_ctx           444 drivers/crypto/ccree/cc_buffer_mgr.c 			req_ctx->out_nents = 0;
req_ctx           445 drivers/crypto/ccree/cc_buffer_mgr.c 			cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src,
req_ctx           447 drivers/crypto/ccree/cc_buffer_mgr.c 					&req_ctx->in_mlli_nents);
req_ctx           452 drivers/crypto/ccree/cc_buffer_mgr.c 			       &req_ctx->out_nents, LLI_MAX_NUM_OF_DATA_ENTRIES,
req_ctx           457 drivers/crypto/ccree/cc_buffer_mgr.c 			req_ctx->dma_buf_type = CC_DMA_BUF_MLLI;
req_ctx           459 drivers/crypto/ccree/cc_buffer_mgr.c 		if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
req_ctx           460 drivers/crypto/ccree/cc_buffer_mgr.c 			cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src,
req_ctx           462 drivers/crypto/ccree/cc_buffer_mgr.c 					&req_ctx->in_mlli_nents);
req_ctx           463 drivers/crypto/ccree/cc_buffer_mgr.c 			cc_add_sg_entry(dev, &sg_data, req_ctx->out_nents, dst,
req_ctx           465 drivers/crypto/ccree/cc_buffer_mgr.c 					&req_ctx->out_mlli_nents);
req_ctx           469 drivers/crypto/ccree/cc_buffer_mgr.c 	if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
req_ctx           477 drivers/crypto/ccree/cc_buffer_mgr.c 		cc_dma_buf_type(req_ctx->dma_buf_type));
req_ctx           482 drivers/crypto/ccree/cc_buffer_mgr.c 	cc_unmap_cipher_request(dev, req_ctx, ivsize, src, dst);
req_ctx           471 drivers/crypto/ccree/cc_cipher.c 				 struct cipher_req_ctx *req_ctx,
req_ctx           479 drivers/crypto/ccree/cc_cipher.c 	int direction = req_ctx->gen_ctx.op_type;
req_ctx           480 drivers/crypto/ccree/cc_cipher.c 	dma_addr_t iv_dma_addr = req_ctx->gen_ctx.iv_dma_addr;
req_ctx           528 drivers/crypto/ccree/cc_cipher.c 				 struct cipher_req_ctx *req_ctx,
req_ctx           537 drivers/crypto/ccree/cc_cipher.c 	int direction = req_ctx->gen_ctx.op_type;
req_ctx           538 drivers/crypto/ccree/cc_cipher.c 	dma_addr_t iv_dma_addr = req_ctx->gen_ctx.iv_dma_addr;
req_ctx           581 drivers/crypto/ccree/cc_cipher.c 				 struct cipher_req_ctx *req_ctx,
req_ctx           590 drivers/crypto/ccree/cc_cipher.c 	int direction = req_ctx->gen_ctx.op_type;
req_ctx           593 drivers/crypto/ccree/cc_cipher.c 	dma_addr_t iv_dma_addr = req_ctx->gen_ctx.iv_dma_addr;
req_ctx           663 drivers/crypto/ccree/cc_cipher.c 			      struct cipher_req_ctx *req_ctx,
req_ctx           671 drivers/crypto/ccree/cc_cipher.c 	int direction = req_ctx->gen_ctx.op_type;
req_ctx           746 drivers/crypto/ccree/cc_cipher.c 			       struct cipher_req_ctx *req_ctx,
req_ctx           754 drivers/crypto/ccree/cc_cipher.c 	if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
req_ctx           757 drivers/crypto/ccree/cc_cipher.c 			&req_ctx->mlli_params.mlli_dma_addr,
req_ctx           758 drivers/crypto/ccree/cc_cipher.c 			req_ctx->mlli_params.mlli_len,
req_ctx           762 drivers/crypto/ccree/cc_cipher.c 			     req_ctx->mlli_params.mlli_dma_addr,
req_ctx           763 drivers/crypto/ccree/cc_cipher.c 			     req_ctx->mlli_params.mlli_len, NS_BIT);
req_ctx           766 drivers/crypto/ccree/cc_cipher.c 			      req_ctx->mlli_params.mlli_len);
req_ctx           773 drivers/crypto/ccree/cc_cipher.c 			       struct cipher_req_ctx *req_ctx,
req_ctx           785 drivers/crypto/ccree/cc_cipher.c 	if (req_ctx->dma_buf_type == CC_DMA_BUF_DLLI) {
req_ctx           804 drivers/crypto/ccree/cc_cipher.c 			     req_ctx->in_mlli_nents, NS_BIT);
req_ctx           805 drivers/crypto/ccree/cc_cipher.c 		if (req_ctx->out_nents == 0) {
req_ctx           811 drivers/crypto/ccree/cc_cipher.c 				      req_ctx->in_mlli_nents, NS_BIT,
req_ctx           817 drivers/crypto/ccree/cc_cipher.c 				(u32)LLI_ENTRY_BYTE_SIZE * req_ctx->in_nents);
req_ctx           821 drivers/crypto/ccree/cc_cipher.c 					req_ctx->in_mlli_nents)),
req_ctx           822 drivers/crypto/ccree/cc_cipher.c 				      req_ctx->out_mlli_nents, NS_BIT,
req_ctx           838 drivers/crypto/ccree/cc_cipher.c 	struct cipher_req_ctx *req_ctx = skcipher_request_ctx(req);
req_ctx           844 drivers/crypto/ccree/cc_cipher.c 		cc_unmap_cipher_request(dev, req_ctx, ivsize, src, dst);
req_ctx           845 drivers/crypto/ccree/cc_cipher.c 		memcpy(req->iv, req_ctx->iv, ivsize);
req_ctx           846 drivers/crypto/ccree/cc_cipher.c 		kzfree(req_ctx->iv);
req_ctx           857 drivers/crypto/ccree/cc_cipher.c 	struct cipher_req_ctx *req_ctx = skcipher_request_ctx(req);
req_ctx           893 drivers/crypto/ccree/cc_cipher.c 	req_ctx->iv = kmemdup(iv, ivsize, flags);
req_ctx           894 drivers/crypto/ccree/cc_cipher.c 	if (!req_ctx->iv) {
req_ctx           911 drivers/crypto/ccree/cc_cipher.c 	req_ctx->gen_ctx.op_type = direction;
req_ctx           915 drivers/crypto/ccree/cc_cipher.c 	rc = cc_map_cipher_request(ctx_p->drvdata, req_ctx, ivsize, nbytes,
req_ctx           916 drivers/crypto/ccree/cc_cipher.c 				      req_ctx->iv, src, dst, flags);
req_ctx           925 drivers/crypto/ccree/cc_cipher.c 	cc_setup_state_desc(tfm, req_ctx, ivsize, nbytes, desc, &seq_len);
req_ctx           927 drivers/crypto/ccree/cc_cipher.c 	cc_setup_mlli_desc(tfm, req_ctx, dst, src, nbytes, req, desc, &seq_len);
req_ctx           929 drivers/crypto/ccree/cc_cipher.c 	cc_setup_key_desc(tfm, req_ctx, nbytes, desc, &seq_len);
req_ctx           931 drivers/crypto/ccree/cc_cipher.c 	cc_setup_xex_state_desc(tfm, req_ctx, ivsize, nbytes, desc, &seq_len);
req_ctx           933 drivers/crypto/ccree/cc_cipher.c 	cc_setup_flow_desc(tfm, req_ctx, dst, src, nbytes, desc, &seq_len);
req_ctx           935 drivers/crypto/ccree/cc_cipher.c 	cc_setup_readiv_desc(tfm, req_ctx, ivsize, desc, &seq_len);
req_ctx           945 drivers/crypto/ccree/cc_cipher.c 		cc_unmap_cipher_request(dev, req_ctx, ivsize, src, dst);
req_ctx           950 drivers/crypto/ccree/cc_cipher.c 		kzfree(req_ctx->iv);
req_ctx           958 drivers/crypto/ccree/cc_cipher.c 	struct cipher_req_ctx *req_ctx = skcipher_request_ctx(req);
req_ctx           960 drivers/crypto/ccree/cc_cipher.c 	memset(req_ctx, 0, sizeof(*req_ctx));
req_ctx           967 drivers/crypto/ccree/cc_cipher.c 	struct cipher_req_ctx *req_ctx = skcipher_request_ctx(req);
req_ctx           969 drivers/crypto/ccree/cc_cipher.c 	memset(req_ctx, 0, sizeof(*req_ctx));
req_ctx          1494 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1509 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.imm = (transhdr_len + param->bfr_len +
req_ctx          1511 drivers/crypto/chelsio/chcr_algo.c 	nents = sg_nents_xlen(req_ctx->hctx_wr.srcsg, param->sg_len,
req_ctx          1512 drivers/crypto/chelsio/chcr_algo.c 		      CHCR_SRC_SG_SIZE, req_ctx->hctx_wr.src_ofst);
req_ctx          1514 drivers/crypto/chelsio/chcr_algo.c 	transhdr_len += req_ctx->hctx_wr.imm ? roundup(param->bfr_len +
req_ctx          1538 drivers/crypto/chelsio/chcr_algo.c 	memcpy(chcr_req->key_ctx.key, req_ctx->partial_hash,
req_ctx          1556 drivers/crypto/chelsio/chcr_algo.c 		req_ctx->hctx_wr.dma_addr =
req_ctx          1557 drivers/crypto/chelsio/chcr_algo.c 			dma_map_single(&u_ctx->lldi.pdev->dev, req_ctx->reqbfr,
req_ctx          1560 drivers/crypto/chelsio/chcr_algo.c 				       req_ctx->hctx_wr. dma_addr)) {
req_ctx          1564 drivers/crypto/chelsio/chcr_algo.c 		req_ctx->hctx_wr.dma_len = param->bfr_len;
req_ctx          1566 drivers/crypto/chelsio/chcr_algo.c 		req_ctx->hctx_wr.dma_addr = 0;
req_ctx          1570 drivers/crypto/chelsio/chcr_algo.c 	temp = param->kctx_len + DUMMY_BYTES + (req_ctx->hctx_wr.imm ?
req_ctx          1573 drivers/crypto/chelsio/chcr_algo.c 	create_wreq(h_ctx(tfm), chcr_req, &req->base, req_ctx->hctx_wr.imm,
req_ctx          1576 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.skb = skb;
req_ctx          1585 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1598 drivers/crypto/chelsio/chcr_algo.c 	if (nbytes + req_ctx->reqlen >= bs) {
req_ctx          1599 drivers/crypto/chelsio/chcr_algo.c 		remainder = (nbytes + req_ctx->reqlen) % bs;
req_ctx          1600 drivers/crypto/chelsio/chcr_algo.c 		nbytes = nbytes + req_ctx->reqlen - remainder;
req_ctx          1602 drivers/crypto/chelsio/chcr_algo.c 		sg_pcopy_to_buffer(req->src, sg_nents(req->src), req_ctx->reqbfr
req_ctx          1603 drivers/crypto/chelsio/chcr_algo.c 				   + req_ctx->reqlen, nbytes, 0);
req_ctx          1604 drivers/crypto/chelsio/chcr_algo.c 		req_ctx->reqlen += nbytes;
req_ctx          1622 drivers/crypto/chelsio/chcr_algo.c 	chcr_init_hctx_per_wr(req_ctx);
req_ctx          1630 drivers/crypto/chelsio/chcr_algo.c 	params.sg_len = chcr_hash_ent_in_wr(req->src, !!req_ctx->reqlen,
req_ctx          1634 drivers/crypto/chelsio/chcr_algo.c 	params.sg_len = rounddown(params.sg_len + req_ctx->reqlen, bs) -
req_ctx          1635 drivers/crypto/chelsio/chcr_algo.c 			req_ctx->reqlen;
req_ctx          1639 drivers/crypto/chelsio/chcr_algo.c 	params.bfr_len = req_ctx->reqlen;
req_ctx          1641 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.srcsg = req->src;
req_ctx          1644 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->data_len += params.sg_len + params.bfr_len;
req_ctx          1651 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.processed += params.sg_len;
req_ctx          1654 drivers/crypto/chelsio/chcr_algo.c 		swap(req_ctx->reqbfr, req_ctx->skbfr);
req_ctx          1656 drivers/crypto/chelsio/chcr_algo.c 				   req_ctx->reqbfr, remainder, req->nbytes -
req_ctx          1659 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->reqlen = remainder;
req_ctx          1684 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1697 drivers/crypto/chelsio/chcr_algo.c 	chcr_init_hctx_per_wr(req_ctx);
req_ctx          1704 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.isfinal = 1;
req_ctx          1714 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.result = 1;
req_ctx          1715 drivers/crypto/chelsio/chcr_algo.c 	params.bfr_len = req_ctx->reqlen;
req_ctx          1716 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->data_len += params.bfr_len + params.sg_len;
req_ctx          1717 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.srcsg = req->src;
req_ctx          1718 drivers/crypto/chelsio/chcr_algo.c 	if (req_ctx->reqlen == 0) {
req_ctx          1719 drivers/crypto/chelsio/chcr_algo.c 		create_last_hash_block(req_ctx->reqbfr, bs, req_ctx->data_len);
req_ctx          1726 drivers/crypto/chelsio/chcr_algo.c 		params.scmd1 = req_ctx->data_len;
req_ctx          1736 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->reqlen = 0;
req_ctx          1748 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1771 drivers/crypto/chelsio/chcr_algo.c 	chcr_init_hctx_per_wr(req_ctx);
req_ctx          1787 drivers/crypto/chelsio/chcr_algo.c 	params.sg_len = chcr_hash_ent_in_wr(req->src, !!req_ctx->reqlen,
req_ctx          1796 drivers/crypto/chelsio/chcr_algo.c 		params.sg_len = rounddown(params.sg_len + req_ctx->reqlen, bs)
req_ctx          1797 drivers/crypto/chelsio/chcr_algo.c 					- req_ctx->reqlen;
req_ctx          1805 drivers/crypto/chelsio/chcr_algo.c 		params.scmd1 = req_ctx->data_len + req_ctx->reqlen +
req_ctx          1808 drivers/crypto/chelsio/chcr_algo.c 	params.bfr_len = req_ctx->reqlen;
req_ctx          1809 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->data_len += params.bfr_len + params.sg_len;
req_ctx          1810 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.result = 1;
req_ctx          1811 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.srcsg = req->src;
req_ctx          1812 drivers/crypto/chelsio/chcr_algo.c 	if ((req_ctx->reqlen + req->nbytes) == 0) {
req_ctx          1813 drivers/crypto/chelsio/chcr_algo.c 		create_last_hash_block(req_ctx->reqbfr, bs, req_ctx->data_len);
req_ctx          1824 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->reqlen = 0;
req_ctx          1825 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.processed += params.sg_len;
req_ctx          1840 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1865 drivers/crypto/chelsio/chcr_algo.c 	chcr_init_hctx_per_wr(req_ctx);
req_ctx          1880 drivers/crypto/chelsio/chcr_algo.c 	params.sg_len = chcr_hash_ent_in_wr(req->src, !!req_ctx->reqlen,
req_ctx          1897 drivers/crypto/chelsio/chcr_algo.c 		params.scmd1 = req->nbytes + req_ctx->data_len;
req_ctx          1901 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.result = 1;
req_ctx          1902 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.srcsg = req->src;
req_ctx          1903 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->data_len += params.bfr_len + params.sg_len;
req_ctx          1906 drivers/crypto/chelsio/chcr_algo.c 		create_last_hash_block(req_ctx->reqbfr, bs, 0);
req_ctx          1916 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.processed += params.sg_len;
req_ctx          2071 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2074 drivers/crypto/chelsio/chcr_algo.c 	state->reqlen = req_ctx->reqlen;
req_ctx          2075 drivers/crypto/chelsio/chcr_algo.c 	state->data_len = req_ctx->data_len;
req_ctx          2076 drivers/crypto/chelsio/chcr_algo.c 	memcpy(state->bfr1, req_ctx->reqbfr, req_ctx->reqlen);
req_ctx          2077 drivers/crypto/chelsio/chcr_algo.c 	memcpy(state->partial_hash, req_ctx->partial_hash,
req_ctx          2085 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2088 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->reqlen = state->reqlen;
req_ctx          2089 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->data_len = state->data_len;
req_ctx          2090 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->reqbfr = req_ctx->bfr1;
req_ctx          2091 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->skbfr = req_ctx->bfr2;
req_ctx          2092 drivers/crypto/chelsio/chcr_algo.c 	memcpy(req_ctx->bfr1, state->bfr1, CHCR_HASH_MAX_BLOCK_SIZE_128);
req_ctx          2093 drivers/crypto/chelsio/chcr_algo.c 	memcpy(req_ctx->partial_hash, state->partial_hash,
req_ctx          2095 drivers/crypto/chelsio/chcr_algo.c 	chcr_init_hctx_per_wr(req_ctx);
req_ctx          2183 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2187 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->data_len = 0;
req_ctx          2188 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->reqlen = 0;
req_ctx          2189 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->reqbfr = req_ctx->bfr1;
req_ctx          2190 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->skbfr = req_ctx->bfr2;
req_ctx          2191 drivers/crypto/chelsio/chcr_algo.c 	copy_hash_init_values(req_ctx->partial_hash, digestsize);
req_ctx          2205 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2212 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->data_len = bs;
req_ctx          2215 drivers/crypto/chelsio/chcr_algo.c 			memcpy(req_ctx->partial_hash, hmacctx->ipad,
req_ctx          2218 drivers/crypto/chelsio/chcr_algo.c 			memcpy(req_ctx->partial_hash, hmacctx->ipad,
req_ctx          2221 drivers/crypto/chelsio/chcr_algo.c 			memcpy(req_ctx->partial_hash, hmacctx->ipad,
req_ctx          2655 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          2664 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.is_sg_map = 1;
req_ctx          2671 drivers/crypto/chelsio/chcr_algo.c 	struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          2678 drivers/crypto/chelsio/chcr_algo.c 	req_ctx->hctx_wr.is_sg_map = 0;
req_ctx           344 drivers/crypto/ixp4xx_crypto.c 	struct aead_ctx *req_ctx = aead_request_ctx(req);
req_ctx           349 drivers/crypto/ixp4xx_crypto.c 	if (req_ctx->encrypt) {
req_ctx           350 drivers/crypto/ixp4xx_crypto.c 		scatterwalk_map_and_copy(req_ctx->hmac_virt,
req_ctx           353 drivers/crypto/ixp4xx_crypto.c 	dma_pool_free(buffer_pool, req_ctx->hmac_virt, crypt->icv_rev_aes);
req_ctx           370 drivers/crypto/ixp4xx_crypto.c 		struct aead_ctx *req_ctx = aead_request_ctx(req);
req_ctx           372 drivers/crypto/ixp4xx_crypto.c 		free_buf_chain(dev, req_ctx->src, crypt->src_buf);
req_ctx           373 drivers/crypto/ixp4xx_crypto.c 		free_buf_chain(dev, req_ctx->dst, crypt->dst_buf);
req_ctx           374 drivers/crypto/ixp4xx_crypto.c 		if (req_ctx->hmac_virt) {
req_ctx           382 drivers/crypto/ixp4xx_crypto.c 		struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
req_ctx           384 drivers/crypto/ixp4xx_crypto.c 		if (req_ctx->dst) {
req_ctx           385 drivers/crypto/ixp4xx_crypto.c 			free_buf_chain(dev, req_ctx->dst, crypt->dst_buf);
req_ctx           387 drivers/crypto/ixp4xx_crypto.c 		free_buf_chain(dev, req_ctx->src, crypt->src_buf);
req_ctx           880 drivers/crypto/ixp4xx_crypto.c 	struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
req_ctx           912 drivers/crypto/ixp4xx_crypto.c 		req_ctx->dst = NULL;
req_ctx           917 drivers/crypto/ixp4xx_crypto.c 		req_ctx->dst = dst_hook.next;
req_ctx           920 drivers/crypto/ixp4xx_crypto.c 		req_ctx->dst = NULL;
req_ctx           922 drivers/crypto/ixp4xx_crypto.c 	req_ctx->src = NULL;
req_ctx           927 drivers/crypto/ixp4xx_crypto.c 	req_ctx->src = src_hook.next;
req_ctx           935 drivers/crypto/ixp4xx_crypto.c 	free_buf_chain(dev, req_ctx->src, crypt->src_buf);
req_ctx           938 drivers/crypto/ixp4xx_crypto.c 		free_buf_chain(dev, req_ctx->dst, crypt->dst_buf);
req_ctx           987 drivers/crypto/ixp4xx_crypto.c 	struct aead_ctx *req_ctx = aead_request_ctx(req);
req_ctx          1027 drivers/crypto/ixp4xx_crypto.c 	req_ctx->src = src_hook.next;
req_ctx          1037 drivers/crypto/ixp4xx_crypto.c 	req_ctx->dst = NULL;
req_ctx          1047 drivers/crypto/ixp4xx_crypto.c 		req_ctx->dst = dst_hook.next;
req_ctx          1064 drivers/crypto/ixp4xx_crypto.c 		req_ctx->hmac_virt = dma_pool_alloc(buffer_pool, flags,
req_ctx          1066 drivers/crypto/ixp4xx_crypto.c 		if (unlikely(!req_ctx->hmac_virt))
req_ctx          1069 drivers/crypto/ixp4xx_crypto.c 			scatterwalk_map_and_copy(req_ctx->hmac_virt,
req_ctx          1072 drivers/crypto/ixp4xx_crypto.c 		req_ctx->encrypt = encrypt;
req_ctx          1074 drivers/crypto/ixp4xx_crypto.c 		req_ctx->hmac_virt = NULL;
req_ctx          1083 drivers/crypto/ixp4xx_crypto.c 	free_buf_chain(dev, req_ctx->dst, crypt->dst_buf);
req_ctx          1085 drivers/crypto/ixp4xx_crypto.c 	free_buf_chain(dev, req_ctx->src, crypt->src_buf);
req_ctx           116 drivers/crypto/mxs-dcp.c 	struct dcp_sha_req_ctx req_ctx;
req_ctx           824 drivers/crypto/mxs-dcp.c 	memcpy(rctx, &export->req_ctx, sizeof(struct dcp_sha_req_ctx));
req_ctx           837 drivers/crypto/mxs-dcp.c 	memcpy(&export->req_ctx, rctx_state, sizeof(struct dcp_sha_req_ctx));
req_ctx          1706 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          1718 drivers/crypto/talitos.c 	if (req_ctx->psrc)
req_ctx          1719 drivers/crypto/talitos.c 		talitos_sg_unmap(dev, edesc, req_ctx->psrc, NULL, 0, 0);
req_ctx          1729 drivers/crypto/talitos.c 	if (is_sec1 && req_ctx->nbuf)
req_ctx          1749 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          1751 drivers/crypto/talitos.c 	if (!req_ctx->last && req_ctx->to_hash_later) {
req_ctx          1753 drivers/crypto/talitos.c 		req_ctx->buf_idx = (req_ctx->buf_idx + 1) & 1;
req_ctx          1754 drivers/crypto/talitos.c 		req_ctx->nbuf = req_ctx->to_hash_later;
req_ctx          1792 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          1804 drivers/crypto/talitos.c 	if (!req_ctx->first || req_ctx->swinit) {
req_ctx          1806 drivers/crypto/talitos.c 					      req_ctx->hw_context_size,
req_ctx          1807 drivers/crypto/talitos.c 					      req_ctx->hw_context,
req_ctx          1809 drivers/crypto/talitos.c 		req_ctx->swinit = 0;
req_ctx          1812 drivers/crypto/talitos.c 	req_ctx->first = 0;
req_ctx          1819 drivers/crypto/talitos.c 	if (is_sec1 && req_ctx->nbuf)
req_ctx          1820 drivers/crypto/talitos.c 		length -= req_ctx->nbuf;
req_ctx          1824 drivers/crypto/talitos.c 		sg_copy_to_buffer(req_ctx->psrc, sg_count, edesc->buf, length);
req_ctx          1826 drivers/crypto/talitos.c 		sg_count = dma_map_sg(dev, req_ctx->psrc, sg_count,
req_ctx          1831 drivers/crypto/talitos.c 	if (is_sec1 && req_ctx->nbuf) {
req_ctx          1832 drivers/crypto/talitos.c 		map_single_talitos_ptr(dev, &desc->ptr[3], req_ctx->nbuf,
req_ctx          1833 drivers/crypto/talitos.c 				       req_ctx->buf[req_ctx->buf_idx],
req_ctx          1836 drivers/crypto/talitos.c 		sg_count = talitos_sg_map(dev, req_ctx->psrc, length, edesc,
req_ctx          1845 drivers/crypto/talitos.c 	if (req_ctx->last)
req_ctx          1851 drivers/crypto/talitos.c 					      req_ctx->hw_context_size,
req_ctx          1852 drivers/crypto/talitos.c 					      req_ctx->hw_context,
req_ctx          1860 drivers/crypto/talitos.c 	if (is_sec1 && req_ctx->nbuf && length) {
req_ctx          1878 drivers/crypto/talitos.c 						      req_ctx->hw_context_size,
req_ctx          1879 drivers/crypto/talitos.c 						      req_ctx->hw_context,
req_ctx          1882 drivers/crypto/talitos.c 		sg_count = talitos_sg_map(dev, req_ctx->psrc, length, edesc,
req_ctx          1887 drivers/crypto/talitos.c 		if (req_ctx->last)
req_ctx          1889 drivers/crypto/talitos.c 						      req_ctx->hw_context_size,
req_ctx          1890 drivers/crypto/talitos.c 						      req_ctx->hw_context,
req_ctx          1915 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          1920 drivers/crypto/talitos.c 		nbytes -= req_ctx->nbuf;
req_ctx          1922 drivers/crypto/talitos.c 	return talitos_edesc_alloc(ctx->dev, req_ctx->psrc, NULL, NULL, 0,
req_ctx          1931 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          1936 drivers/crypto/talitos.c 	req_ctx->buf_idx = 0;
req_ctx          1937 drivers/crypto/talitos.c 	req_ctx->nbuf = 0;
req_ctx          1938 drivers/crypto/talitos.c 	req_ctx->first = 1; /* first indicates h/w must init its context */
req_ctx          1939 drivers/crypto/talitos.c 	req_ctx->swinit = 0; /* assume h/w init of context */
req_ctx          1943 drivers/crypto/talitos.c 	req_ctx->hw_context_size = size;
req_ctx          1945 drivers/crypto/talitos.c 	dma = dma_map_single(dev, req_ctx->hw_context, req_ctx->hw_context_size,
req_ctx          1947 drivers/crypto/talitos.c 	dma_unmap_single(dev, dma, req_ctx->hw_context_size, DMA_TO_DEVICE);
req_ctx          1958 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          1960 drivers/crypto/talitos.c 	req_ctx->hw_context[0] = SHA224_H0;
req_ctx          1961 drivers/crypto/talitos.c 	req_ctx->hw_context[1] = SHA224_H1;
req_ctx          1962 drivers/crypto/talitos.c 	req_ctx->hw_context[2] = SHA224_H2;
req_ctx          1963 drivers/crypto/talitos.c 	req_ctx->hw_context[3] = SHA224_H3;
req_ctx          1964 drivers/crypto/talitos.c 	req_ctx->hw_context[4] = SHA224_H4;
req_ctx          1965 drivers/crypto/talitos.c 	req_ctx->hw_context[5] = SHA224_H5;
req_ctx          1966 drivers/crypto/talitos.c 	req_ctx->hw_context[6] = SHA224_H6;
req_ctx          1967 drivers/crypto/talitos.c 	req_ctx->hw_context[7] = SHA224_H7;
req_ctx          1970 drivers/crypto/talitos.c 	req_ctx->hw_context[8] = 0;
req_ctx          1971 drivers/crypto/talitos.c 	req_ctx->hw_context[9] = 0;
req_ctx          1974 drivers/crypto/talitos.c 	req_ctx->swinit = 1;/* prevent h/w initting context with sha256 values*/
req_ctx          1983 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          1994 drivers/crypto/talitos.c 	u8 *ctx_buf = req_ctx->buf[req_ctx->buf_idx];
req_ctx          1996 drivers/crypto/talitos.c 	if (!req_ctx->last && (nbytes + req_ctx->nbuf <= blocksize)) {
req_ctx          2004 drivers/crypto/talitos.c 				  ctx_buf + req_ctx->nbuf, nbytes);
req_ctx          2005 drivers/crypto/talitos.c 		req_ctx->nbuf += nbytes;
req_ctx          2010 drivers/crypto/talitos.c 	nbytes_to_hash = nbytes + req_ctx->nbuf;
req_ctx          2013 drivers/crypto/talitos.c 	if (req_ctx->last)
req_ctx          2025 drivers/crypto/talitos.c 	if (!is_sec1 && req_ctx->nbuf) {
req_ctx          2026 drivers/crypto/talitos.c 		nsg = (req_ctx->nbuf < nbytes_to_hash) ? 2 : 1;
req_ctx          2027 drivers/crypto/talitos.c 		sg_init_table(req_ctx->bufsl, nsg);
req_ctx          2028 drivers/crypto/talitos.c 		sg_set_buf(req_ctx->bufsl, ctx_buf, req_ctx->nbuf);
req_ctx          2030 drivers/crypto/talitos.c 			sg_chain(req_ctx->bufsl, 2, areq->src);
req_ctx          2031 drivers/crypto/talitos.c 		req_ctx->psrc = req_ctx->bufsl;
req_ctx          2032 drivers/crypto/talitos.c 	} else if (is_sec1 && req_ctx->nbuf && req_ctx->nbuf < blocksize) {
req_ctx          2036 drivers/crypto/talitos.c 			offset = blocksize - req_ctx->nbuf;
req_ctx          2038 drivers/crypto/talitos.c 			offset = nbytes_to_hash - req_ctx->nbuf;
req_ctx          2045 drivers/crypto/talitos.c 				  ctx_buf + req_ctx->nbuf, offset);
req_ctx          2046 drivers/crypto/talitos.c 		req_ctx->nbuf += offset;
req_ctx          2047 drivers/crypto/talitos.c 		req_ctx->psrc = scatterwalk_ffwd(req_ctx->bufsl, areq->src,
req_ctx          2050 drivers/crypto/talitos.c 		req_ctx->psrc = areq->src;
req_ctx          2059 drivers/crypto/talitos.c 				   req_ctx->buf[(req_ctx->buf_idx + 1) & 1],
req_ctx          2063 drivers/crypto/talitos.c 	req_ctx->to_hash_later = to_hash_later;
req_ctx          2073 drivers/crypto/talitos.c 	if (req_ctx->last)
req_ctx          2079 drivers/crypto/talitos.c 	if (req_ctx->first && !req_ctx->swinit)
req_ctx          2085 drivers/crypto/talitos.c 	if (ctx->keylen && (req_ctx->first || req_ctx->last))
req_ctx          2093 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2095 drivers/crypto/talitos.c 	req_ctx->last = 0;
req_ctx          2102 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2104 drivers/crypto/talitos.c 	req_ctx->last = 1;
req_ctx          2111 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2113 drivers/crypto/talitos.c 	req_ctx->last = 1;
req_ctx          2120 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2124 drivers/crypto/talitos.c 	req_ctx->last = 1;
req_ctx          2131 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2138 drivers/crypto/talitos.c 	dma = dma_map_single(dev, req_ctx->hw_context, req_ctx->hw_context_size,
req_ctx          2140 drivers/crypto/talitos.c 	dma_unmap_single(dev, dma, req_ctx->hw_context_size, DMA_FROM_DEVICE);
req_ctx          2142 drivers/crypto/talitos.c 	memcpy(export->hw_context, req_ctx->hw_context,
req_ctx          2143 drivers/crypto/talitos.c 	       req_ctx->hw_context_size);
req_ctx          2144 drivers/crypto/talitos.c 	memcpy(export->buf, req_ctx->buf[req_ctx->buf_idx], req_ctx->nbuf);
req_ctx          2145 drivers/crypto/talitos.c 	export->swinit = req_ctx->swinit;
req_ctx          2146 drivers/crypto/talitos.c 	export->first = req_ctx->first;
req_ctx          2147 drivers/crypto/talitos.c 	export->last = req_ctx->last;
req_ctx          2148 drivers/crypto/talitos.c 	export->to_hash_later = req_ctx->to_hash_later;
req_ctx          2149 drivers/crypto/talitos.c 	export->nbuf = req_ctx->nbuf;
req_ctx          2156 drivers/crypto/talitos.c 	struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
req_ctx          2164 drivers/crypto/talitos.c 	memset(req_ctx, 0, sizeof(*req_ctx));
req_ctx          2168 drivers/crypto/talitos.c 	req_ctx->hw_context_size = size;
req_ctx          2169 drivers/crypto/talitos.c 	memcpy(req_ctx->hw_context, export->hw_context, size);
req_ctx          2170 drivers/crypto/talitos.c 	memcpy(req_ctx->buf[0], export->buf, export->nbuf);
req_ctx          2171 drivers/crypto/talitos.c 	req_ctx->swinit = export->swinit;
req_ctx          2172 drivers/crypto/talitos.c 	req_ctx->first = export->first;
req_ctx          2173 drivers/crypto/talitos.c 	req_ctx->last = export->last;
req_ctx          2174 drivers/crypto/talitos.c 	req_ctx->to_hash_later = export->to_hash_later;
req_ctx          2175 drivers/crypto/talitos.c 	req_ctx->nbuf = export->nbuf;
req_ctx          2177 drivers/crypto/talitos.c 	dma = dma_map_single(dev, req_ctx->hw_context, req_ctx->hw_context_size,
req_ctx          2179 drivers/crypto/talitos.c 	dma_unmap_single(dev, dma, req_ctx->hw_context_size, DMA_TO_DEVICE);
req_ctx           553 drivers/crypto/ux500/hash/hash_core.c 	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx           558 drivers/crypto/ux500/hash/hash_core.c 	memset(&req_ctx->state, 0, sizeof(struct hash_state));
req_ctx           559 drivers/crypto/ux500/hash/hash_core.c 	req_ctx->updated = 0;
req_ctx           562 drivers/crypto/ux500/hash/hash_core.c 			req_ctx->dma_mode = false; /* Don't use DMA */
req_ctx           569 drivers/crypto/ux500/hash/hash_core.c 				req_ctx->dma_mode = true;
req_ctx           571 drivers/crypto/ux500/hash/hash_core.c 				req_ctx->dma_mode = false;
req_ctx           764 drivers/crypto/ux500/hash/hash_core.c 			     struct hash_ctx *ctx, struct hash_req_ctx *req_ctx,
req_ctx           780 drivers/crypto/ux500/hash/hash_core.c 			if (req_ctx->updated) {
req_ctx           783 drivers/crypto/ux500/hash/hash_core.c 				memmove(req_ctx->state.buffer,
req_ctx           800 drivers/crypto/ux500/hash/hash_core.c 				req_ctx->updated = 1;
req_ctx           825 drivers/crypto/ux500/hash/hash_core.c 			hash_incrementlength(req_ctx, HASH_BLOCK_SIZE);
req_ctx           835 drivers/crypto/ux500/hash/hash_core.c 				req_ctx->state.buffer,
req_ctx           858 drivers/crypto/ux500/hash/hash_core.c 	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx           870 drivers/crypto/ux500/hash/hash_core.c 	if (req_ctx->updated) {
req_ctx           880 drivers/crypto/ux500/hash/hash_core.c 	if (!req_ctx->updated) {
req_ctx           890 drivers/crypto/ux500/hash/hash_core.c 		if (hash_mode != HASH_MODE_DMA || !req_ctx->dma_mode) {
req_ctx           907 drivers/crypto/ux500/hash/hash_core.c 		req_ctx->updated = 1;
req_ctx           965 drivers/crypto/ux500/hash/hash_core.c 	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx           976 drivers/crypto/ux500/hash/hash_core.c 	if (req_ctx->updated) {
req_ctx          1017 drivers/crypto/ux500/hash/hash_core.c 	if (!req_ctx->updated) {
req_ctx          1026 drivers/crypto/ux500/hash/hash_core.c 	if (req_ctx->state.index) {
req_ctx          1027 drivers/crypto/ux500/hash/hash_core.c 		hash_messagepad(device_data, req_ctx->state.buffer,
req_ctx          1028 drivers/crypto/ux500/hash/hash_core.c 				req_ctx->state.index);
req_ctx          1073 drivers/crypto/ux500/hash/hash_core.c 	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1081 drivers/crypto/ux500/hash/hash_core.c 	index = req_ctx->state.index;
req_ctx          1082 drivers/crypto/ux500/hash/hash_core.c 	buffer = (u8 *)req_ctx->state.buffer;
req_ctx          1086 drivers/crypto/ux500/hash/hash_core.c 	if (msg_length > (req_ctx->state.length.low_word + msg_length) &&
req_ctx          1087 drivers/crypto/ux500/hash/hash_core.c 	    HASH_HIGH_WORD_MAX_VAL == req_ctx->state.length.high_word) {
req_ctx          1099 drivers/crypto/ux500/hash/hash_core.c 		ret = hash_process_data(device_data, ctx, req_ctx, msg_length,
req_ctx          1111 drivers/crypto/ux500/hash/hash_core.c 	req_ctx->state.index = index;
req_ctx          1113 drivers/crypto/ux500/hash/hash_core.c 		__func__, req_ctx->state.index, req_ctx->state.bit_index);
req_ctx          1297 drivers/crypto/ux500/hash/hash_core.c 	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1299 drivers/crypto/ux500/hash/hash_core.c 	if (hash_mode != HASH_MODE_DMA || !req_ctx->dma_mode)
req_ctx          1317 drivers/crypto/ux500/hash/hash_core.c 	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);
req_ctx          1321 drivers/crypto/ux500/hash/hash_core.c 	if ((hash_mode == HASH_MODE_DMA) && req_ctx->dma_mode)