req_clock         351 drivers/gpu/drm/radeon/radeon_clocks.c 				   uint32_t req_clock,
req_clock         362 drivers/gpu/drm/radeon/radeon_clocks.c 	if (req_clock < 15000) {
req_clock         364 drivers/gpu/drm/radeon/radeon_clocks.c 		req_clock *= 8;
req_clock         365 drivers/gpu/drm/radeon/radeon_clocks.c 	} else if (req_clock < 30000) {
req_clock         367 drivers/gpu/drm/radeon/radeon_clocks.c 		req_clock *= 4;
req_clock         368 drivers/gpu/drm/radeon/radeon_clocks.c 	} else if (req_clock < 60000) {
req_clock         370 drivers/gpu/drm/radeon/radeon_clocks.c 		req_clock *= 2;
req_clock         374 drivers/gpu/drm/radeon/radeon_clocks.c 	req_clock *= ref_div;
req_clock         375 drivers/gpu/drm/radeon/radeon_clocks.c 	req_clock += spll->reference_freq;
req_clock         376 drivers/gpu/drm/radeon/radeon_clocks.c 	req_clock /= (2 * spll->reference_freq);
req_clock         378 drivers/gpu/drm/radeon/radeon_clocks.c 	*fb_div = req_clock & 0xff;
req_clock         380 drivers/gpu/drm/radeon/radeon_clocks.c 	req_clock = (req_clock & 0xffff) << 1;
req_clock         381 drivers/gpu/drm/radeon/radeon_clocks.c 	req_clock *= spll->reference_freq;
req_clock         382 drivers/gpu/drm/radeon/radeon_clocks.c 	req_clock /= ref_div;
req_clock         383 drivers/gpu/drm/radeon/radeon_clocks.c 	req_clock /= *post_div;
req_clock         385 drivers/gpu/drm/radeon/radeon_clocks.c 	return req_clock;