regvalue          306 drivers/hwmon/gl518sm.c 	int regvalue;							\
regvalue          313 drivers/hwmon/gl518sm.c 	regvalue = gl518_read_value(client, reg);			\
regvalue          315 drivers/hwmon/gl518sm.c 	regvalue = (regvalue & ~mask) | (data->value << shift);		\
regvalue          316 drivers/hwmon/gl518sm.c 	gl518_write_value(client, reg, regvalue);			\
regvalue          347 drivers/hwmon/gl518sm.c 	int regvalue;
regvalue          356 drivers/hwmon/gl518sm.c 	regvalue = gl518_read_value(client, GL518_REG_FAN_LIMIT);
regvalue          358 drivers/hwmon/gl518sm.c 	regvalue = (regvalue & (0xff << (8 * nr)))
regvalue          360 drivers/hwmon/gl518sm.c 	gl518_write_value(client, GL518_REG_FAN_LIMIT, regvalue);
regvalue          381 drivers/hwmon/gl518sm.c 	int regvalue;
regvalue          410 drivers/hwmon/gl518sm.c 	regvalue = gl518_read_value(client, GL518_REG_MISC);
regvalue          412 drivers/hwmon/gl518sm.c 	regvalue = (regvalue & ~(0xc0 >> (2 * nr)))
regvalue          414 drivers/hwmon/gl518sm.c 	gl518_write_value(client, GL518_REG_MISC, regvalue);
regvalue          601 drivers/hwmon/gl518sm.c 	u8 regvalue = gl518_read_value(client, GL518_REG_CONF) & 0x7f;
regvalue          604 drivers/hwmon/gl518sm.c 	gl518_write_value(client, GL518_REG_CONF, (regvalue &= 0x37));
regvalue          610 drivers/hwmon/gl518sm.c 	gl518_write_value(client, GL518_REG_CONF, 0x20 | regvalue);
regvalue          611 drivers/hwmon/gl518sm.c 	gl518_write_value(client, GL518_REG_CONF, 0x40 | regvalue);
regvalue          532 drivers/mfd/ab3100-core.c 		u8 regvalue;
regvalue          534 drivers/mfd/ab3100-core.c 		ab3100_get_register_interruptible(ab3100, user_reg, &regvalue);
regvalue          538 drivers/mfd/ab3100-core.c 			 user_reg, regvalue);
regvalue          542 drivers/mfd/ab3100-core.c 		u8 regvalue;
regvalue          562 drivers/mfd/ab3100-core.c 		ab3100_get_register_interruptible(ab3100, user_reg, &regvalue);
regvalue          567 drivers/mfd/ab3100-core.c 			 user_reg, user_value, regvalue);
regvalue         1461 drivers/mfd/ab8500-debugfs.c 	u8 regvalue;
regvalue         1464 drivers/mfd/ab8500-debugfs.c 		(u8)debug_bank, (u8)debug_address, &regvalue);
regvalue         1470 drivers/mfd/ab8500-debugfs.c 	seq_printf(s, "0x%02X\n", regvalue);
regvalue         1557 drivers/mfd/ab8500-debugfs.c 	u8 regvalue;
regvalue         1560 drivers/mfd/ab8500-debugfs.c 		(u8)hwreg_cfg.bank, (u8)hwreg_cfg.addr, &regvalue);
regvalue         1568 drivers/mfd/ab8500-debugfs.c 		regvalue >>= hwreg_cfg.shift;
regvalue         1570 drivers/mfd/ab8500-debugfs.c 		regvalue <<= -hwreg_cfg.shift;
regvalue         1571 drivers/mfd/ab8500-debugfs.c 	regvalue &= hwreg_cfg.mask;
regvalue         1574 drivers/mfd/ab8500-debugfs.c 		seq_printf(s, "%d\n", regvalue);
regvalue         1576 drivers/mfd/ab8500-debugfs.c 		seq_printf(s, "0x%02X\n", regvalue);
regvalue         2312 drivers/mfd/ab8500-debugfs.c 	u8  regvalue;
regvalue         2404 drivers/mfd/ab8500-debugfs.c 			(u8)cfg->bank, (u8)cfg->addr, &regvalue);
regvalue         2412 drivers/mfd/ab8500-debugfs.c 		regvalue &= ~(cfg->mask << (cfg->shift));
regvalue         2415 drivers/mfd/ab8500-debugfs.c 		regvalue &= ~(cfg->mask >> (-cfg->shift));
regvalue         2418 drivers/mfd/ab8500-debugfs.c 	val = val | regvalue;
regvalue          291 drivers/mmc/host/vub300.c 	unsigned regvalue:8;
regvalue          556 drivers/mmc/host/vub300.c 			vub300->sdio_register[i].regvalue =
regvalue         1876 drivers/mmc/host/vub300.c 				u8 rsp3 = vub300->sdio_register[i].regvalue;
regvalue         1591 drivers/net/ethernet/intel/igb/e1000_mac.c 	u32 i, regvalue = 0;
regvalue         1595 drivers/net/ethernet/intel/igb/e1000_mac.c 	regvalue = ((u32)data) | (offset << E1000_GEN_CTL_ADDRESS_SHIFT);
regvalue         1596 drivers/net/ethernet/intel/igb/e1000_mac.c 	wr32(reg, regvalue);
regvalue         1601 drivers/net/ethernet/intel/igb/e1000_mac.c 		regvalue = rd32(reg);
regvalue         1602 drivers/net/ethernet/intel/igb/e1000_mac.c 		if (regvalue & E1000_GEN_CTL_READY)
regvalue         1605 drivers/net/ethernet/intel/igb/e1000_mac.c 	if (!(regvalue & E1000_GEN_CTL_READY)) {
regvalue          201 drivers/net/ethernet/toshiba/spider_net.c 	u32 regvalue;
regvalue          203 drivers/net/ethernet/toshiba/spider_net.c 	regvalue = SPIDER_NET_INT0_MASK_VALUE & (~SPIDER_NET_RXINT);
regvalue          204 drivers/net/ethernet/toshiba/spider_net.c 	spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, regvalue);
regvalue          216 drivers/net/ethernet/toshiba/spider_net.c 	u32 regvalue;
regvalue          218 drivers/net/ethernet/toshiba/spider_net.c 	regvalue = SPIDER_NET_INT0_MASK_VALUE | SPIDER_NET_RXINT;
regvalue          219 drivers/net/ethernet/toshiba/spider_net.c 	spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, regvalue);
regvalue         1282 drivers/net/ethernet/toshiba/spider_net.c 	u32 macl, macu, regvalue;
regvalue         1291 drivers/net/ethernet/toshiba/spider_net.c 	regvalue = spider_net_read_reg(card, SPIDER_NET_GMACOPEMD);
regvalue         1292 drivers/net/ethernet/toshiba/spider_net.c 	regvalue &= ~((1 << 5) | (1 << 6));
regvalue         1293 drivers/net/ethernet/toshiba/spider_net.c 	spider_net_write_reg(card, SPIDER_NET_GMACOPEMD, regvalue);
regvalue         1303 drivers/net/ethernet/toshiba/spider_net.c 	regvalue = spider_net_read_reg(card, SPIDER_NET_GMACOPEMD);
regvalue         1304 drivers/net/ethernet/toshiba/spider_net.c 	regvalue |= ((1 << 5) | (1 << 6));
regvalue         1305 drivers/net/ethernet/toshiba/spider_net.c 	spider_net_write_reg(card, SPIDER_NET_GMACOPEMD, regvalue);
regvalue          470 sound/soc/codecs/alc5623.c 	u16 regvalue;
regvalue          550 sound/soc/codecs/alc5623.c 				pll_div  = codec_master_pll_div[i].regvalue;
regvalue          561 sound/soc/codecs/alc5623.c 				pll_div = codec_slave_pll_div[i].regvalue;
regvalue          586 sound/soc/codecs/alc5623.c 	u16 regvalue;
regvalue          732 sound/soc/codecs/alc5623.c 	coeff = coeff_div[coeff].regvalue;
regvalue          619 sound/soc/codecs/alc5632.c 	u16 regvalue;
regvalue          710 sound/soc/codecs/alc5632.c 				pll_div  = codec_master_pll_div[i].regvalue;
regvalue          721 sound/soc/codecs/alc5632.c 				pll_div = codec_slave_pll_div[i].regvalue;
regvalue          732 sound/soc/codecs/alc5632.c 				pll_div = codec_slave_pll_div[i].regvalue;
regvalue          766 sound/soc/codecs/alc5632.c 	u16 regvalue;
regvalue          899 sound/soc/codecs/alc5632.c 	coeff = coeff_div[coeff].regvalue;
regvalue           39 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	unsigned int regvalue;
regvalue           43 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 8000, .regvalue = 0 },
regvalue           44 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 12000, .regvalue = 1 },
regvalue           45 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 16000, .regvalue = 2 },
regvalue           46 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 24000, .regvalue = 3 },
regvalue           47 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 32000, .regvalue = 4 },
regvalue           48 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 48000, .regvalue = 5 },
regvalue           49 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 96000, .regvalue = 6 },
regvalue           50 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 192000, .regvalue = 7 },
regvalue           51 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 384000, .regvalue = 8 },
regvalue           52 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 7350, .regvalue = 16 },
regvalue           53 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 11025, .regvalue = 17 },
regvalue           54 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 14700, .regvalue = 18 },
regvalue           55 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 22050, .regvalue = 19 },
regvalue           56 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 29400, .regvalue = 20 },
regvalue           57 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 44100, .regvalue = 21 },
regvalue           58 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 88200, .regvalue = 22 },
regvalue           59 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 176400, .regvalue = 23 },
regvalue           60 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 	{ .rate = 352800, .regvalue = 24 },
regvalue          103 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 			return mt2701_afe_i2s_rates[i].regvalue;
regvalue          166 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	unsigned int regvalue;
regvalue          170 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 8000, .regvalue = 0 },
regvalue          171 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 11025, .regvalue = 1 },
regvalue          172 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 12000, .regvalue = 2 },
regvalue          173 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 16000, .regvalue = 4 },
regvalue          174 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 22050, .regvalue = 5 },
regvalue          175 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 24000, .regvalue = 6 },
regvalue          176 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 32000, .regvalue = 8 },
regvalue          177 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 44100, .regvalue = 9 },
regvalue          178 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 48000, .regvalue = 10 },
regvalue          179 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 88000, .regvalue = 11 },
regvalue          180 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 96000, .regvalue = 12 },
regvalue          181 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 174000, .regvalue = 13 },
regvalue          182 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 	{ .rate = 192000, .regvalue = 14 },
regvalue          191 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 			return mt8173_afe_i2s_rates[i].regvalue;