regs_idx          439 drivers/gpu/drm/armada/armada_crtc.c 	dcrtc->regs_idx = 0;
regs_idx          450 drivers/gpu/drm/armada/armada_crtc.c 	armada_reg_queue_end(dcrtc->regs, dcrtc->regs_idx);
regs_idx           69 drivers/gpu/drm/armada/armada_crtc.h 	unsigned int		regs_idx;
regs_idx           89 drivers/gpu/drm/armada/armada_overlay.c 	regs = dcrtc->regs + dcrtc->regs_idx;
regs_idx          211 drivers/gpu/drm/armada/armada_overlay.c 	dcrtc->regs_idx += idx;
regs_idx          232 drivers/gpu/drm/armada/armada_overlay.c 	regs = dcrtc->regs + dcrtc->regs_idx;
regs_idx          239 drivers/gpu/drm/armada/armada_overlay.c 	dcrtc->regs_idx += idx;
regs_idx          179 drivers/gpu/drm/armada/armada_plane.c 	regs = dcrtc->regs + dcrtc->regs_idx;
regs_idx          241 drivers/gpu/drm/armada/armada_plane.c 	dcrtc->regs_idx += idx;
regs_idx          262 drivers/gpu/drm/armada/armada_plane.c 	regs = dcrtc->regs + dcrtc->regs_idx;
regs_idx          270 drivers/gpu/drm/armada/armada_plane.c 	dcrtc->regs_idx += idx;