regm 189 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c struct regmap *regm; regm 207 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c regmap_write(hdmi->regm, offset << hdmi->reg_shift, val); regm 214 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val); regm 221 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c regmap_update_bits(hdmi->regm, reg << hdmi->reg_shift, mask, data); regm 2657 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c if (!plat_data->regm) { regm 2681 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hdmi->regm = devm_regmap_init_mmio(dev, hdmi->regs, reg_config); regm 2682 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c if (IS_ERR(hdmi->regm)) { regm 2684 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ret = PTR_ERR(hdmi->regm); regm 2688 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hdmi->regm = plat_data->regm; regm 894 drivers/gpu/drm/meson/meson_dw_hdmi.c dw_plat_data->regm = devm_regmap_init(dev, NULL, meson_dw_hdmi, regm 896 drivers/gpu/drm/meson/meson_dw_hdmi.c if (IS_ERR(dw_plat_data->regm)) regm 897 drivers/gpu/drm/meson/meson_dw_hdmi.c return PTR_ERR(dw_plat_data->regm); regm 124 include/drm/bridge/dw_hdmi.h struct regmap *regm;