region_base       925 arch/mips/cavium-octeon/octeon-platform.c 		unsigned long base_ptr, region_base, region_size;
region_base       952 arch/mips/cavium-octeon/octeon-platform.c 			region_base = mio_boot_reg_cfg.s.base << 16;
region_base       954 arch/mips/cavium-octeon/octeon-platform.c 			if (mio_boot_reg_cfg.s.en && base_ptr >= region_base
region_base       955 arch/mips/cavium-octeon/octeon-platform.c 				&& base_ptr < region_base + region_size) {
region_base      1007 arch/mips/cavium-octeon/octeon-platform.c 		ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32);
region_base      1008 arch/mips/cavium-octeon/octeon-platform.c 		ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff);
region_base      1029 arch/mips/cavium-octeon/octeon-platform.c 		unsigned long base_ptr, region_base, region_size;
region_base      1042 arch/mips/cavium-octeon/octeon-platform.c 			region_base = mio_boot_reg_cfg.s.base << 16;
region_base      1044 arch/mips/cavium-octeon/octeon-platform.c 			if (mio_boot_reg_cfg.s.en && base_ptr >= region_base
region_base      1045 arch/mips/cavium-octeon/octeon-platform.c 				&& base_ptr < region_base + region_size)
region_base      1068 arch/mips/cavium-octeon/octeon-platform.c 		ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32);
region_base      1069 arch/mips/cavium-octeon/octeon-platform.c 		ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff);