region1_base      926 arch/mips/cavium-octeon/octeon-platform.c 		unsigned long region1_base = 0;
region1_base      975 arch/mips/cavium-octeon/octeon-platform.c 			region1_base = mio_boot_reg_cfg.s.base << 16;
region1_base     1012 arch/mips/cavium-octeon/octeon-platform.c 			ranges[(cs * 5) + 2] = cpu_to_be32(region1_base >> 32);
region1_base     1013 arch/mips/cavium-octeon/octeon-platform.c 			ranges[(cs * 5) + 3] = cpu_to_be32(region1_base & 0xffffffff);