regcount          632 arch/arm64/include/asm/assembler.h 	.macro		frame_push, regcount:req, extra
regcount          654 arch/arm64/include/asm/assembler.h 	.macro		__frame, op, regcount, extra=0
regcount          436 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	int i, regcount = 0;
regcount          454 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 				regcount += count;
regcount          460 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	datasize = regcount * A6XX_NUM_CONTEXTS * sizeof(u32);
regcount          504 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	int i, regcount = 0;
regcount          525 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 				regcount += count;
regcount          531 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	datasize = regcount * A6XX_NUM_CONTEXTS * sizeof(u32);
regcount          624 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	int i, regcount = 0;
regcount          636 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 		regcount += count;
regcount          641 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	if (WARN_ON((regcount * sizeof(u32)) > A6XX_CD_DATA_SIZE))
regcount          649 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 		regcount * sizeof(u32));
regcount          662 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	int i, regcount = 0;
regcount          674 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 		regcount += count;
regcount          679 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	if (WARN_ON((regcount * sizeof(u32)) > A6XX_CD_DATA_SIZE))
regcount          687 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 		regcount * sizeof(u32));
regcount          696 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	int i, regcount = 0, index = 0;
regcount          699 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 		regcount += RANGE(regs->registers, i);
regcount          702 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	obj->data = state_kcalloc(a6xx_state, regcount, sizeof(u32));
regcount          725 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	int i, regcount = 0, index = 0;
regcount          728 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 		regcount += RANGE(regs->registers, i);
regcount          731 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	obj->data = state_kcalloc(a6xx_state, regcount, sizeof(u32));
regcount          334 include/sound/soc.h 		{.regbase = xregbase, .regcount = xregcount, .nbits = xnbits, \
regcount         1195 include/sound/soc.h 	unsigned int regbase, regcount, nbits, invert;
regcount          833 sound/soc/soc-ops.c 	unsigned int regcount = mc->regcount;
regcount          845 sound/soc/soc-ops.c 	for (i = 0; i < regcount; i++) {
regcount          849 sound/soc/soc-ops.c 		val |= (regval & regwmask) << (regwshift*(regcount-i-1));
regcount          882 sound/soc/soc-ops.c 	unsigned int regcount = mc->regcount;
regcount          895 sound/soc/soc-ops.c 	for (i = 0; i < regcount; i++) {
regcount          896 sound/soc/soc-ops.c 		regval = (val >> (regwshift*(regcount-i-1))) & regwmask;
regcount          897 sound/soc/soc-ops.c 		regmask = (mask >> (regwshift*(regcount-i-1))) & regwmask;