regbase 60 arch/mips/include/asm/mach-au1x00/au1xxx_ide.h u32 regbase; regbase 169 arch/mips/netlogic/xlp/ahci-init-xlp2.c static void sata_clear_glue_reg(u64 regbase, u32 off, u32 bit) regbase 173 arch/mips/netlogic/xlp/ahci-init-xlp2.c reg_val = nlm_read_sata_reg(regbase, off); regbase 174 arch/mips/netlogic/xlp/ahci-init-xlp2.c nlm_write_sata_reg(regbase, off, (reg_val & ~bit)); regbase 177 arch/mips/netlogic/xlp/ahci-init-xlp2.c static void sata_set_glue_reg(u64 regbase, u32 off, u32 bit) regbase 181 arch/mips/netlogic/xlp/ahci-init-xlp2.c reg_val = nlm_read_sata_reg(regbase, off); regbase 182 arch/mips/netlogic/xlp/ahci-init-xlp2.c nlm_write_sata_reg(regbase, off, (reg_val | bit)); regbase 185 arch/mips/netlogic/xlp/ahci-init-xlp2.c static void write_phy_reg(u64 regbase, u32 addr, u32 physel, u8 data) regbase 187 arch/mips/netlogic/xlp/ahci-init-xlp2.c nlm_write_sata_reg(regbase, PHY_MEM_ACCESS, regbase 192 arch/mips/netlogic/xlp/ahci-init-xlp2.c static u8 read_phy_reg(u64 regbase, u32 addr, u32 physel) regbase 196 arch/mips/netlogic/xlp/ahci-init-xlp2.c nlm_write_sata_reg(regbase, PHY_MEM_ACCESS, regbase 199 arch/mips/netlogic/xlp/ahci-init-xlp2.c val = nlm_read_sata_reg(regbase, PHY_MEM_ACCESS); regbase 203 arch/mips/netlogic/xlp/ahci-init-xlp2.c static void config_sata_phy(u64 regbase) regbase 210 arch/mips/netlogic/xlp/ahci-init-xlp2.c write_phy_reg(regbase, reg, port, sata_phy_config1[i]); regbase 213 arch/mips/netlogic/xlp/ahci-init-xlp2.c write_phy_reg(regbase, reg, port, sata_phy_config2[i]); regbase 216 arch/mips/netlogic/xlp/ahci-init-xlp2.c write_phy_reg(regbase, 0x800F, port, 0x1f); regbase 218 arch/mips/netlogic/xlp/ahci-init-xlp2.c val = read_phy_reg(regbase, 0x0029, port); regbase 219 arch/mips/netlogic/xlp/ahci-init-xlp2.c write_phy_reg(regbase, 0x0029, port, val | (0x7 << 1)); regbase 221 arch/mips/netlogic/xlp/ahci-init-xlp2.c val = read_phy_reg(regbase, 0x0056, port); regbase 222 arch/mips/netlogic/xlp/ahci-init-xlp2.c write_phy_reg(regbase, 0x0056, port, val & ~(1 << 3)); regbase 224 arch/mips/netlogic/xlp/ahci-init-xlp2.c val = read_phy_reg(regbase, 0x0018, port); regbase 225 arch/mips/netlogic/xlp/ahci-init-xlp2.c write_phy_reg(regbase, 0x0018, port, val & ~(0x7 << 0)); regbase 229 arch/mips/netlogic/xlp/ahci-init-xlp2.c static void check_phy_register(u64 regbase, u32 addr, u32 physel, u8 xdata) regbase 233 arch/mips/netlogic/xlp/ahci-init-xlp2.c data = read_phy_reg(regbase, addr, physel); regbase 238 arch/mips/netlogic/xlp/ahci-init-xlp2.c static void verify_sata_phy_config(u64 regbase) regbase 244 arch/mips/netlogic/xlp/ahci-init-xlp2.c check_phy_register(regbase, reg, port, regbase 248 arch/mips/netlogic/xlp/ahci-init-xlp2.c check_phy_register(regbase, reg, port, regbase 256 arch/mips/netlogic/xlp/ahci-init-xlp2.c u64 regbase; regbase 260 arch/mips/netlogic/xlp/ahci-init-xlp2.c regbase = nlm_get_sata_regbase(node); regbase 263 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P0_IRST_POR); regbase 264 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P0_IRST_HARD_TXRX); regbase 265 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P0_IRST_HARD_SYNTH); regbase 266 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P0_IPDTXL); regbase 267 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P0_IPDRXL); regbase 268 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P0_IPDIPDMSYNTH); regbase 271 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P1_IRST_POR); regbase 272 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P1_IRST_HARD_TXRX); regbase 273 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P1_IRST_HARD_SYNTH); regbase 274 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P1_IPDTXL); regbase 275 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P1_IPDRXL); regbase 276 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_clear_glue_reg(regbase, SATA_CTL, P1_IPDIPDMSYNTH); regbase 280 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P0_IPDTXL); regbase 281 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P0_IPDRXL); regbase 282 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P0_IPDIPDMSYNTH); regbase 283 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P1_IPDTXL); regbase 284 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P1_IPDRXL); regbase 285 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P1_IPDIPDMSYNTH); regbase 288 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P0_IRST_POR); regbase 290 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P1_IRST_POR); regbase 294 arch/mips/netlogic/xlp/ahci-init-xlp2.c config_sata_phy(regbase); regbase 296 arch/mips/netlogic/xlp/ahci-init-xlp2.c verify_sata_phy_config(regbase); regbase 299 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P0_IRST_HARD_TXRX); regbase 300 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P0_IRST_HARD_SYNTH); regbase 301 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P1_IRST_HARD_TXRX); regbase 302 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, P1_IRST_HARD_SYNTH); regbase 306 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, CR_REG_TIMER, CR_TIME_SCALE); regbase 308 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, SATA_RST_N); regbase 309 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, M_CSYSREQ); regbase 310 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_CTL, S_CSYSREQ); regbase 315 arch/mips/netlogic/xlp/ahci-init-xlp2.c reg_val = nlm_read_sata_reg(regbase, SATA_STATUS); regbase 347 arch/mips/netlogic/xlp/ahci-init-xlp2.c u64 regbase; regbase 352 arch/mips/netlogic/xlp/ahci-init-xlp2.c regbase = nlm_get_sata_regbase(node); regbase 353 arch/mips/netlogic/xlp/ahci-init-xlp2.c val = nlm_read_sata_reg(regbase, SATA_INT); regbase 354 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_INT, val); regbase 366 arch/mips/netlogic/xlp/ahci-init-xlp2.c u64 regbase; regbase 371 arch/mips/netlogic/xlp/ahci-init-xlp2.c regbase = nlm_get_sata_regbase(node); regbase 374 arch/mips/netlogic/xlp/ahci-init-xlp2.c val = nlm_read_sata_reg(regbase, SATA_INT); regbase 375 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_INT, val); regbase 378 arch/mips/netlogic/xlp/ahci-init-xlp2.c sata_set_glue_reg(regbase, SATA_INT_MASK, 0x1); regbase 95 arch/mips/netlogic/xlp/ahci-init.c static void sata_clear_glue_reg(uint64_t regbase, uint32_t off, uint32_t bit) regbase 99 arch/mips/netlogic/xlp/ahci-init.c reg_val = nlm_read_sata_reg(regbase, off); regbase 100 arch/mips/netlogic/xlp/ahci-init.c nlm_write_sata_reg(regbase, off, (reg_val & ~bit)); regbase 103 arch/mips/netlogic/xlp/ahci-init.c static void sata_set_glue_reg(uint64_t regbase, uint32_t off, uint32_t bit) regbase 107 arch/mips/netlogic/xlp/ahci-init.c reg_val = nlm_read_sata_reg(regbase, off); regbase 108 arch/mips/netlogic/xlp/ahci-init.c nlm_write_sata_reg(regbase, off, (reg_val | bit)); regbase 114 arch/mips/netlogic/xlp/ahci-init.c uint64_t regbase; regbase 118 arch/mips/netlogic/xlp/ahci-init.c regbase = nlm_get_sata_regbase(node); regbase 121 arch/mips/netlogic/xlp/ahci-init.c sata_clear_glue_reg(regbase, SATA_CTL, SATA_RST_N); regbase 123 arch/mips/netlogic/xlp/ahci-init.c sata_clear_glue_reg(regbase, SATA_CTL, regbase 128 arch/mips/netlogic/xlp/ahci-init.c sata_set_glue_reg(regbase, SATA_CTL, SATA_RST_N); regbase 130 arch/mips/netlogic/xlp/ahci-init.c sata_set_glue_reg(regbase, SATA_CTL, regbase 137 arch/mips/netlogic/xlp/ahci-init.c reg_val = nlm_read_sata_reg(regbase, SATA_STATUS); regbase 164 arch/mips/netlogic/xlp/ahci-init.c uint64_t regbase; regbase 166 arch/mips/netlogic/xlp/ahci-init.c regbase = nlm_get_sata_regbase(nlm_nodeid()); regbase 167 arch/mips/netlogic/xlp/ahci-init.c val = nlm_read_sata_reg(regbase, SATA_INT); regbase 168 arch/mips/netlogic/xlp/ahci-init.c sata_set_glue_reg(regbase, SATA_INT, val); regbase 184 arch/mips/netlogic/xlp/ahci-init.c uint64_t regbase; regbase 187 arch/mips/netlogic/xlp/ahci-init.c regbase = nlm_get_sata_regbase(node); regbase 190 arch/mips/netlogic/xlp/ahci-init.c val = nlm_read_sata_reg(regbase, SATA_INT); regbase 191 arch/mips/netlogic/xlp/ahci-init.c sata_set_glue_reg(regbase, SATA_INT, val); regbase 198 arch/mips/netlogic/xlp/ahci-init.c sata_set_glue_reg(regbase, SATA_INT_MASK, 0x1); regbase 42 arch/mips/rb532/gpio.c void __iomem *regbase; regbase 92 arch/mips/rb532/gpio.c return !!rb532_get_bit(offset, gpch->regbase + GPIOD); regbase 104 arch/mips/rb532/gpio.c rb532_set_bit(value, offset, gpch->regbase + GPIOD); regbase 117 arch/mips/rb532/gpio.c rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); regbase 119 arch/mips/rb532/gpio.c rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); regbase 134 arch/mips/rb532/gpio.c rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); regbase 137 arch/mips/rb532/gpio.c rb532_set_bit(value, offset, gpch->regbase + GPIOD); regbase 139 arch/mips/rb532/gpio.c rb532_set_bit(1, offset, gpch->regbase + GPIOCFG); regbase 168 arch/mips/rb532/gpio.c rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL); regbase 177 arch/mips/rb532/gpio.c rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT); regbase 186 arch/mips/rb532/gpio.c rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC); regbase 195 arch/mips/rb532/gpio.c rb532_gpio_chip->regbase = ioremap_nocache(r->start, resource_size(r)); regbase 197 arch/mips/rb532/gpio.c if (!rb532_gpio_chip->regbase) { regbase 76 arch/parisc/include/asm/grfioctl.h gaddr_t fbbase, regbase;/* framebuffer and register base addr */ regbase 132 arch/sparc/kernel/pci_schizo.c unsigned long regbase = pbm->pbm_regs; regbase 137 arch/sparc/kernel/pci_schizo.c err_base = regbase + SCHIZO_STC_ERR; regbase 138 arch/sparc/kernel/pci_schizo.c tag_base = regbase + SCHIZO_STC_TAG; regbase 139 arch/sparc/kernel/pci_schizo.c line_base = regbase + SCHIZO_STC_LINE; regbase 370 drivers/clk/at91/sckc.c void __iomem *regbase = of_iomap(np, 0); regbase 377 drivers/clk/at91/sckc.c if (!regbase) regbase 380 drivers/clk/at91/sckc.c slow_rc = at91_clk_register_slow_rc_osc(regbase, parent_names[0], regbase 404 drivers/clk/at91/sckc.c slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], regbase 409 drivers/clk/at91/sckc.c slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, regbase 463 drivers/clk/at91/sckc.c void __iomem *regbase = of_iomap(np, 0); regbase 471 drivers/clk/at91/sckc.c if (!regbase) regbase 484 drivers/clk/at91/sckc.c slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], regbase 503 drivers/clk/at91/sckc.c clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck", regbase 572 drivers/clk/at91/sckc.c void __iomem *regbase = of_iomap(np, 0); regbase 580 drivers/clk/at91/sckc.c if (!regbase) regbase 603 drivers/clk/at91/sckc.c osc->sckcr = regbase; regbase 611 drivers/clk/at91/sckc.c slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", regbase 71 drivers/clk/socfpga/clk-gate-s10.c void __iomem *regbase, unsigned long gate_reg, regbase 85 drivers/clk/socfpga/clk-gate-s10.c socfpga_clk->hw.reg = regbase + gate_reg; regbase 94 drivers/clk/socfpga/clk-gate-s10.c socfpga_clk->div_reg = regbase + div_reg; regbase 102 drivers/clk/socfpga/clk-gate-s10.c socfpga_clk->bypass_reg = regbase + bypass_reg; regbase 111 drivers/clk/socfpga/clk-periph-s10.c void __iomem *regbase, unsigned long offset, regbase 124 drivers/clk/socfpga/clk-periph-s10.c periph_clk->hw.reg = regbase + offset; regbase 129 drivers/clk/socfpga/clk-periph-s10.c periph_clk->bypass_reg = regbase + bypass_reg; regbase 21 drivers/clk/uniphier/clk-uniphier-cpugear.c unsigned int regbase; regbase 35 drivers/clk/uniphier/clk-uniphier-cpugear.c gear->regbase + UNIPHIER_CLK_CPUGEAR_SET, regbase 41 drivers/clk/uniphier/clk-uniphier-cpugear.c gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, regbase 48 drivers/clk/uniphier/clk-uniphier-cpugear.c gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, regbase 61 drivers/clk/uniphier/clk-uniphier-cpugear.c gear->regbase + UNIPHIER_CLK_CPUGEAR_STAT, &val); regbase 96 drivers/clk/uniphier/clk-uniphier-cpugear.c gear->regbase = data->regbase; regbase 28 drivers/clk/uniphier/clk-uniphier.h unsigned int regbase; regbase 78 drivers/clk/uniphier/clk-uniphier.h .regbase = (_regbase), \ regbase 41 drivers/clocksource/timer-vt8500.c static void __iomem *regbase; regbase 46 drivers/clocksource/timer-vt8500.c writel(3, regbase + TIMER_CTRL_VAL); regbase 47 drivers/clocksource/timer-vt8500.c while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE) regbase 50 drivers/clocksource/timer-vt8500.c return readl(regbase + TIMER_COUNT_VAL); regbase 66 drivers/clocksource/timer-vt8500.c while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE) regbase 69 drivers/clocksource/timer-vt8500.c writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL); regbase 74 drivers/clocksource/timer-vt8500.c writel(1, regbase + TIMER_IER_VAL); regbase 81 drivers/clocksource/timer-vt8500.c writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL); regbase 82 drivers/clocksource/timer-vt8500.c writel(0, regbase + TIMER_IER_VAL); regbase 98 drivers/clocksource/timer-vt8500.c writel(0xf, regbase + TIMER_STATUS_VAL); regbase 115 drivers/clocksource/timer-vt8500.c regbase = of_iomap(np, 0); regbase 116 drivers/clocksource/timer-vt8500.c if (!regbase) { regbase 129 drivers/clocksource/timer-vt8500.c writel(1, regbase + TIMER_CTRL_VAL); regbase 130 drivers/clocksource/timer-vt8500.c writel(0xf, regbase + TIMER_STATUS_VAL); regbase 131 drivers/clocksource/timer-vt8500.c writel(~0, regbase + TIMER_MATCH_VAL); regbase 60 drivers/gpio/gpio-f7188x.c unsigned int regbase; regbase 153 drivers/gpio/gpio-f7188x.c .regbase = _regbase, \ regbase 249 drivers/gpio/gpio-f7188x.c dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); regbase 268 drivers/gpio/gpio-f7188x.c dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); regbase 270 drivers/gpio/gpio-f7188x.c superio_outb(sio->addr, gpio_dir(bank->regbase), dir); regbase 289 drivers/gpio/gpio-f7188x.c dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); regbase 292 drivers/gpio/gpio-f7188x.c data = superio_inb(sio->addr, gpio_data_out(bank->regbase)); regbase 294 drivers/gpio/gpio-f7188x.c data = superio_inb(sio->addr, gpio_data_in(bank->regbase)); regbase 314 drivers/gpio/gpio-f7188x.c data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); regbase 319 drivers/gpio/gpio-f7188x.c superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); regbase 321 drivers/gpio/gpio-f7188x.c dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); regbase 323 drivers/gpio/gpio-f7188x.c superio_outb(sio->addr, gpio_dir(bank->regbase), dir); regbase 342 drivers/gpio/gpio-f7188x.c data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); regbase 347 drivers/gpio/gpio-f7188x.c superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); regbase 370 drivers/gpio/gpio-f7188x.c data = superio_inb(sio->addr, gpio_out_mode(bank->regbase)); regbase 375 drivers/gpio/gpio-f7188x.c superio_outb(sio->addr, gpio_out_mode(bank->regbase), data); regbase 66 drivers/gpio/gpio-pxa.c void __iomem *regbase; regbase 165 drivers/gpio/gpio-pxa.c return bank->regbase; regbase 347 drivers/gpio/gpio-pxa.c struct device_node *np, void __iomem *regbase) regbase 378 drivers/gpio/gpio-pxa.c bank->regbase = regbase + BANK_OFF(i); regbase 391 drivers/gpio/gpio-pxa.c grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask; regbase 392 drivers/gpio/gpio-pxa.c gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask; regbase 395 drivers/gpio/gpio-pxa.c writel_relaxed(grer, c->regbase + GRER_OFFSET); regbase 396 drivers/gpio/gpio-pxa.c writel_relaxed(gfer, c->regbase + GFER_OFFSET); regbase 419 drivers/gpio/gpio-pxa.c gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); regbase 422 drivers/gpio/gpio-pxa.c writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET); regbase 424 drivers/gpio/gpio-pxa.c writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET); regbase 454 drivers/gpio/gpio-pxa.c gedr = readl_relaxed(c->regbase + GEDR_OFFSET); regbase 456 drivers/gpio/gpio-pxa.c writel_relaxed(gedr, c->regbase + GEDR_OFFSET); regbase 691 drivers/gpio/gpio-pxa.c writel_relaxed(0, c->regbase + GFER_OFFSET); regbase 692 drivers/gpio/gpio-pxa.c writel_relaxed(0, c->regbase + GRER_OFFSET); regbase 693 drivers/gpio/gpio-pxa.c writel_relaxed(~0, c->regbase + GEDR_OFFSET); regbase 696 drivers/gpio/gpio-pxa.c writel_relaxed(~0, c->regbase + ED_MASK_OFFSET); regbase 777 drivers/gpio/gpio-pxa.c c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET); regbase 778 drivers/gpio/gpio-pxa.c c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); regbase 779 drivers/gpio/gpio-pxa.c c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET); regbase 780 drivers/gpio/gpio-pxa.c c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET); regbase 783 drivers/gpio/gpio-pxa.c writel_relaxed(0xffffffff, c->regbase + GEDR_OFFSET); regbase 799 drivers/gpio/gpio-pxa.c writel_relaxed(c->saved_gplr, c->regbase + GPSR_OFFSET); regbase 800 drivers/gpio/gpio-pxa.c writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET); regbase 802 drivers/gpio/gpio-pxa.c writel_relaxed(c->saved_grer, c->regbase + GRER_OFFSET); regbase 803 drivers/gpio/gpio-pxa.c writel_relaxed(c->saved_gfer, c->regbase + GFER_OFFSET); regbase 804 drivers/gpio/gpio-pxa.c writel_relaxed(c->saved_gpdr, c->regbase + GPDR_OFFSET); regbase 1928 drivers/gpu/drm/drm_dp_mst_topology.c int regbase = up ? DP_SIDEBAND_MSG_UP_REP_BASE : DP_SIDEBAND_MSG_DOWN_REQ_BASE; regbase 1938 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_dpcd_write(mgr->aux, regbase + offset, regbase 437 drivers/gpu/drm/i915/gvt/interrupt.c #define DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(regname, regbase) \ regbase 440 drivers/gpu/drm/i915/gvt/interrupt.c .reg_base = (regbase), \ regbase 48 drivers/gpu/drm/msm/edp/edp.h void *msm_edp_aux_init(struct device *dev, void __iomem *regbase, regbase 60 drivers/gpu/drm/msm/edp/edp.h void *msm_edp_phy_init(struct device *dev, void __iomem *regbase); regbase 187 drivers/gpu/drm/msm/edp/edp_aux.c void *msm_edp_aux_init(struct device *dev, void __iomem *regbase, regbase 198 drivers/gpu/drm/msm/edp/edp_aux.c aux->base = regbase; regbase 87 drivers/gpu/drm/msm/edp/edp_phy.c void *msm_edp_phy_init(struct device *dev, void __iomem *regbase) regbase 95 drivers/gpu/drm/msm/edp/edp_phy.c phy->base = regbase; regbase 325 drivers/ide/au1xxx-ide.c u32 devwidth, u32 flags, u32 regbase) regbase 328 drivers/ide/au1xxx-ide.c dev->dev_physaddr = CPHYSADDR(regbase); regbase 365 drivers/ide/au1xxx-ide.c DEV_FLAGS_OUT | flags, auide->regbase); regbase 369 drivers/ide/au1xxx-ide.c DEV_FLAGS_IN | flags, auide->regbase); regbase 374 drivers/ide/au1xxx-ide.c devwidth, DEV_FLAGS_ANYUSE, auide->regbase); regbase 417 drivers/ide/au1xxx-ide.c DEV_FLAGS_OUT | flags, auide->regbase); regbase 421 drivers/ide/au1xxx-ide.c DEV_FLAGS_IN | flags, auide->regbase); regbase 455 drivers/ide/au1xxx-ide.c *ata_regs++ = ahwif->regbase + (i << IDE_REG_SHIFT); regbase 458 drivers/ide/au1xxx-ide.c *ata_regs = ahwif->regbase + (14 << IDE_REG_SHIFT); regbase 537 drivers/ide/au1xxx-ide.c ahwif->regbase = (u32)ioremap(res->start, resource_size(res)); regbase 538 drivers/ide/au1xxx-ide.c if (ahwif->regbase == 0) { regbase 578 drivers/ide/au1xxx-ide.c iounmap((void *)ahwif->regbase); regbase 51 drivers/ide/pmac.c unsigned long regbase; regbase 1134 drivers/ide/pmac.c unsigned long regbase; regbase 1171 drivers/ide/pmac.c regbase = (unsigned long) base; regbase 1175 drivers/ide/pmac.c pmif->regbase = regbase; regbase 1192 drivers/ide/pmac.c pmac_ide_init_ports(&hw, pmif->regbase); regbase 1293 drivers/ide/pmac.c pmif->regbase = (unsigned long) base + 0x2000; regbase 1301 drivers/ide/pmac.c pmac_ide_init_ports(&hw, pmif->regbase); regbase 1222 drivers/iommu/omap-iommu.c obj->regbase = devm_ioremap_resource(obj->dev, res); regbase 1223 drivers/iommu/omap-iommu.c if (IS_ERR(obj->regbase)) regbase 1224 drivers/iommu/omap-iommu.c return PTR_ERR(obj->regbase); regbase 56 drivers/iommu/omap-iommu.h void __iomem *regbase; regbase 258 drivers/iommu/omap-iommu.h return __raw_readl(obj->regbase + offs); regbase 263 drivers/iommu/omap-iommu.h __raw_writel(val, obj->regbase + offs); regbase 559 drivers/macintosh/mediabay.c u32 __iomem *regbase; regbase 575 drivers/macintosh/mediabay.c regbase = (u32 __iomem *)ioremap(base, 0x100); regbase 576 drivers/macintosh/mediabay.c if (regbase == NULL) { regbase 584 drivers/macintosh/mediabay.c bay->base = regbase; regbase 43 drivers/mfd/sm501.c void __iomem *regbase; regbase 893 drivers/mfd/sm501.c result = smc501_readl(smgpio->regbase + SM501_GPIO_DATA_LOW); regbase 924 drivers/mfd/sm501.c void __iomem *regs = smchip->regbase; regbase 948 drivers/mfd/sm501.c void __iomem *regs = smchip->regbase; regbase 975 drivers/mfd/sm501.c void __iomem *regs = smchip->regbase; regbase 1025 drivers/mfd/sm501.c chip->regbase = gpio->regs + SM501_GPIO_DATA_HIGH; regbase 1029 drivers/mfd/sm501.c chip->regbase = gpio->regs + SM501_GPIO_DATA_LOW; regbase 93 drivers/mtd/spi-nor/hisi-sfc.c void __iomem *regbase; regbase 107 drivers/mtd/spi-nor/hisi-sfc.c return readl_poll_timeout(host->regbase + FMC_INT, reg, regbase 144 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_SPI_TIMING_CFG); regbase 187 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_CMD); regbase 190 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_DATA_NUM); regbase 193 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_OP_CFG); regbase 195 drivers/mtd/spi-nor/hisi-sfc.c writel(0xff, host->regbase + FMC_INT_CLR); regbase 197 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_OP); regbase 237 drivers/mtd/spi-nor/hisi-sfc.c reg = readl(host->regbase + FMC_CFG); regbase 242 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_CFG); regbase 244 drivers/mtd/spi-nor/hisi-sfc.c writel(start_off, host->regbase + FMC_ADDRL); regbase 245 drivers/mtd/spi-nor/hisi-sfc.c writel(dma_buf, host->regbase + FMC_DMA_SADDR_D0); regbase 246 drivers/mtd/spi-nor/hisi-sfc.c writel(FMC_DMA_LEN_SET(len), host->regbase + FMC_DMA_LEN); regbase 256 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_OP_CFG); regbase 258 drivers/mtd/spi-nor/hisi-sfc.c writel(0xff, host->regbase + FMC_INT_CLR); regbase 263 drivers/mtd/spi-nor/hisi-sfc.c writel(reg, host->regbase + FMC_OP_DMA); regbase 431 drivers/mtd/spi-nor/hisi-sfc.c host->regbase = devm_ioremap_resource(dev, res); regbase 432 drivers/mtd/spi-nor/hisi-sfc.c if (IS_ERR(host->regbase)) regbase 433 drivers/mtd/spi-nor/hisi-sfc.c return PTR_ERR(host->regbase); regbase 684 drivers/net/ethernet/broadcom/tg3.c u32 regbase, bit; regbase 687 drivers/net/ethernet/broadcom/tg3.c regbase = TG3_APE_LOCK_GRANT; regbase 689 drivers/net/ethernet/broadcom/tg3.c regbase = TG3_APE_PER_LOCK_GRANT; regbase 706 drivers/net/ethernet/broadcom/tg3.c tg3_ape_write32(tp, regbase + 4 * i, bit); regbase 1399 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c u64 regbase = reg & 0xFFFF; regbase 1412 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c if (regbase == NIX_AF_MDQX_PARENT(0) && regbase 1417 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c if (regbase == NIX_AF_TL4X_PARENT(0) && regbase 1422 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c if (regbase == NIX_AF_TL3X_PARENT(0) && regbase 1427 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c if (regbase == NIX_AF_TL2X_PARENT(0) && regbase 511 drivers/net/ethernet/nxp/lpc_eth.c static void lpc_eth_enable_int(void __iomem *regbase) regbase 514 drivers/net/ethernet/nxp/lpc_eth.c LPC_ENET_INTENABLE(regbase)); regbase 517 drivers/net/ethernet/nxp/lpc_eth.c static void lpc_eth_disable_int(void __iomem *regbase) regbase 519 drivers/net/ethernet/nxp/lpc_eth.c writel(0, LPC_ENET_INTENABLE(regbase)); regbase 777 drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c u32 *regbase, u32 *wrapbase) regbase 784 drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c *regbase = 0; regbase 840 drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c if (*regbase == 0 && stype == DMP_SLAVE_TYPE_SLAVE) regbase 841 drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c *regbase = val & DMP_SLAVE_ADDR_BASE; regbase 844 drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c } while (*regbase == 0 || *wrapbase == 0); regbase 41 drivers/pinctrl/pinctrl-at91.c void __iomem *regbase; /* PIO bank virtual address */ regbase 343 drivers/pinctrl/pinctrl-at91.c return gpio_chips[bank]->regbase; regbase 935 drivers/pinctrl/pinctrl-at91.c writel_relaxed(mask, at91_chip->regbase + PIO_PER); regbase 1412 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1423 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1433 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1445 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1455 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1470 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1485 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1532 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1542 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1564 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1647 drivers/pinctrl/pinctrl-at91.c pio = gpio_chips[i]->regbase; regbase 1671 drivers/pinctrl/pinctrl-at91.c pio = gpio_chips[i]->regbase; regbase 1690 drivers/pinctrl/pinctrl-at91.c void __iomem *pio = at91_gpio->regbase; regbase 1705 drivers/pinctrl/pinctrl-at91.c pio = at91_gpio->regbase; regbase 1743 drivers/pinctrl/pinctrl-at91.c writel_relaxed(~0, at91_gpio->regbase + PIO_IDR); regbase 1844 drivers/pinctrl/pinctrl-at91.c at91_chip->regbase = devm_ioremap_resource(&pdev->dev, res); regbase 1845 drivers/pinctrl/pinctrl-at91.c if (IS_ERR(at91_chip->regbase)) { regbase 1846 drivers/pinctrl/pinctrl-at91.c ret = PTR_ERR(at91_chip->regbase); regbase 1917 drivers/pinctrl/pinctrl-at91.c dev_info(&pdev->dev, "at address %p\n", at91_chip->regbase); regbase 370 drivers/platform/x86/intel_pmc_core.c return readb(pmcdev->regbase + offset); regbase 375 drivers/platform/x86/intel_pmc_core.c return readl(pmcdev->regbase + reg_offset); regbase 381 drivers/platform/x86/intel_pmc_core.c writel(val, pmcdev->regbase + reg_offset); regbase 893 drivers/platform/x86/intel_pmc_core.c pmcdev->regbase = ioremap(pmcdev->base_addr, regbase 895 drivers/platform/x86/intel_pmc_core.c if (!pmcdev->regbase) regbase 918 drivers/platform/x86/intel_pmc_core.c iounmap(pmcdev->regbase); regbase 252 drivers/platform/x86/intel_pmc_core.h void __iomem *regbase; regbase 97 drivers/rtc/rtc-sh.c void __iomem *regbase; regbase 114 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR1); regbase 117 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR1); regbase 130 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR1); regbase 133 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR1); regbase 145 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR2); regbase 148 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR2); regbase 222 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR1); regbase 229 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR1); regbase 239 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR1); regbase 242 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR2); regbase 256 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR1); regbase 263 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR1); regbase 279 drivers/rtc/rtc-sh.c if (!(readb(rtc->regbase + RCR2) & RCR2_RTCEN)) regbase 287 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR1); regbase 290 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR1); regbase 292 drivers/rtc/rtc-sh.c sec128 = readb(rtc->regbase + R64CNT); regbase 294 drivers/rtc/rtc-sh.c tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT)); regbase 295 drivers/rtc/rtc-sh.c tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT)); regbase 296 drivers/rtc/rtc-sh.c tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT)); regbase 297 drivers/rtc/rtc-sh.c tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT)); regbase 298 drivers/rtc/rtc-sh.c tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT)); regbase 299 drivers/rtc/rtc-sh.c tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1; regbase 302 drivers/rtc/rtc-sh.c yr = readw(rtc->regbase + RYRCNT); regbase 306 drivers/rtc/rtc-sh.c yr = readb(rtc->regbase + RYRCNT); regbase 312 drivers/rtc/rtc-sh.c sec2 = readb(rtc->regbase + R64CNT); regbase 313 drivers/rtc/rtc-sh.c cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF; regbase 345 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR2); regbase 348 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR2); regbase 350 drivers/rtc/rtc-sh.c writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT); regbase 351 drivers/rtc/rtc-sh.c writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT); regbase 352 drivers/rtc/rtc-sh.c writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT); regbase 353 drivers/rtc/rtc-sh.c writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT); regbase 354 drivers/rtc/rtc-sh.c writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT); regbase 355 drivers/rtc/rtc-sh.c writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT); regbase 360 drivers/rtc/rtc-sh.c writew(year, rtc->regbase + RYRCNT); regbase 363 drivers/rtc/rtc-sh.c writeb(bin2bcd(year), rtc->regbase + RYRCNT); regbase 367 drivers/rtc/rtc-sh.c tmp = readb(rtc->regbase + RCR2); regbase 370 drivers/rtc/rtc-sh.c writeb(tmp, rtc->regbase + RCR2); regbase 382 drivers/rtc/rtc-sh.c byte = readb(rtc->regbase + reg_off); regbase 407 drivers/rtc/rtc-sh.c wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0; regbase 419 drivers/rtc/rtc-sh.c writeb(0, rtc->regbase + reg_off); regbase 421 drivers/rtc/rtc-sh.c writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off); regbase 434 drivers/rtc/rtc-sh.c rcr1 = readb(rtc->regbase + RCR1); regbase 436 drivers/rtc/rtc-sh.c writeb(rcr1, rtc->regbase + RCR1); regbase 451 drivers/rtc/rtc-sh.c writeb(rcr1, rtc->regbase + RCR1); regbase 507 drivers/rtc/rtc-sh.c rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start, regbase 509 drivers/rtc/rtc-sh.c if (unlikely(!rtc->regbase)) regbase 73 drivers/rtc/rtc-vt8500.c void __iomem *regbase; regbase 88 drivers/rtc/rtc-vt8500.c isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); regbase 89 drivers/rtc/rtc-vt8500.c writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS); regbase 106 drivers/rtc/rtc-vt8500.c date = readl(vt8500_rtc->regbase + VT8500_RTC_DR); regbase 107 drivers/rtc/rtc-vt8500.c time = readl(vt8500_rtc->regbase + VT8500_RTC_TR); regbase 135 drivers/rtc/rtc-vt8500.c vt8500_rtc->regbase + VT8500_RTC_DS); regbase 140 drivers/rtc/rtc-vt8500.c vt8500_rtc->regbase + VT8500_RTC_TS); regbase 150 drivers/rtc/rtc-vt8500.c alarm = readl(vt8500_rtc->regbase + VT8500_RTC_AS); regbase 151 drivers/rtc/rtc-vt8500.c isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); regbase 173 drivers/rtc/rtc-vt8500.c vt8500_rtc->regbase + VT8500_RTC_AS); regbase 181 drivers/rtc/rtc-vt8500.c unsigned long tmp = readl(vt8500_rtc->regbase + VT8500_RTC_AS); regbase 188 drivers/rtc/rtc-vt8500.c writel(tmp, vt8500_rtc->regbase + VT8500_RTC_AS); regbase 219 drivers/rtc/rtc-vt8500.c vt8500_rtc->regbase = devm_ioremap_resource(&pdev->dev, res); regbase 220 drivers/rtc/rtc-vt8500.c if (IS_ERR(vt8500_rtc->regbase)) regbase 221 drivers/rtc/rtc-vt8500.c return PTR_ERR(vt8500_rtc->regbase); regbase 225 drivers/rtc/rtc-vt8500.c vt8500_rtc->regbase + VT8500_RTC_CR); regbase 255 drivers/rtc/rtc-vt8500.c writel(0, vt8500_rtc->regbase + VT8500_RTC_IS); regbase 169 drivers/spi/spi-lantiq-ssc.c void __iomem *regbase; regbase 191 drivers/spi/spi-lantiq-ssc.c return __raw_readl(spi->regbase + reg); regbase 197 drivers/spi/spi-lantiq-ssc.c __raw_writel(val, spi->regbase + reg); regbase 203 drivers/spi/spi-lantiq-ssc.c u32 val = __raw_readl(spi->regbase + reg); regbase 207 drivers/spi/spi-lantiq-ssc.c __raw_writel(val, spi->regbase + reg); regbase 843 drivers/spi/spi-lantiq-ssc.c spi->regbase = devm_ioremap_resource(dev, res); regbase 844 drivers/spi/spi-lantiq-ssc.c if (IS_ERR(spi->regbase)) { regbase 845 drivers/spi/spi-lantiq-ssc.c err = PTR_ERR(spi->regbase); regbase 678 drivers/spi/spi-npcm-fiu.c void __iomem *regbase; regbase 708 drivers/spi/spi-npcm-fiu.c regbase = devm_ioremap_resource(dev, res); regbase 709 drivers/spi/spi-npcm-fiu.c if (IS_ERR(regbase)) regbase 710 drivers/spi/spi-npcm-fiu.c return PTR_ERR(regbase); regbase 712 drivers/spi/spi-npcm-fiu.c fiu->regmap = devm_regmap_init_mmio(dev, regbase, regbase 108 drivers/staging/comedi/drivers/8255.c unsigned long regbase = subdev_8255_regbase(s); regbase 110 drivers/staging/comedi/drivers/8255.c release_region(regbase, I8255_SIZE); regbase 32 drivers/staging/comedi/drivers/8255.h int data, unsigned long regbase), regbase 33 drivers/staging/comedi/drivers/8255.h unsigned long regbase); regbase 37 drivers/staging/comedi/drivers/8255.h int data, unsigned long regbase), regbase 38 drivers/staging/comedi/drivers/8255.h unsigned long regbase); regbase 37 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase; regbase 39 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase); regbase 43 drivers/staging/comedi/drivers/comedi_8255.c int dir, int port, int data, unsigned long regbase) regbase 46 drivers/staging/comedi/drivers/comedi_8255.c outb(data, dev->iobase + regbase + port); regbase 49 drivers/staging/comedi/drivers/comedi_8255.c return inb(dev->iobase + regbase + port); regbase 53 drivers/staging/comedi/drivers/comedi_8255.c int dir, int port, int data, unsigned long regbase) regbase 56 drivers/staging/comedi/drivers/comedi_8255.c writeb(data, dev->mmio + regbase + port); regbase 59 drivers/staging/comedi/drivers/comedi_8255.c return readb(dev->mmio + regbase + port); regbase 68 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase = spriv->regbase; regbase 76 drivers/staging/comedi/drivers/comedi_8255.c s->state & 0xff, regbase); regbase 79 drivers/staging/comedi/drivers/comedi_8255.c (s->state >> 8) & 0xff, regbase); regbase 82 drivers/staging/comedi/drivers/comedi_8255.c (s->state >> 16) & 0xff, regbase); regbase 85 drivers/staging/comedi/drivers/comedi_8255.c v = spriv->io(dev, 0, I8255_DATA_A_REG, 0, regbase); regbase 86 drivers/staging/comedi/drivers/comedi_8255.c v |= (spriv->io(dev, 0, I8255_DATA_B_REG, 0, regbase) << 8); regbase 87 drivers/staging/comedi/drivers/comedi_8255.c v |= (spriv->io(dev, 0, I8255_DATA_C_REG, 0, regbase) << 16); regbase 98 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase = spriv->regbase; regbase 112 drivers/staging/comedi/drivers/comedi_8255.c spriv->io(dev, 1, I8255_CTRL_REG, config, regbase); regbase 146 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase), regbase 147 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase, regbase 162 drivers/staging/comedi/drivers/comedi_8255.c spriv->regbase = regbase; regbase 205 drivers/staging/comedi/drivers/comedi_8255.c int data, unsigned long regbase), regbase 206 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase) regbase 208 drivers/staging/comedi/drivers/comedi_8255.c return __subdev_8255_init(dev, s, io, regbase, false); regbase 240 drivers/staging/comedi/drivers/comedi_8255.c int data, unsigned long regbase), regbase 241 drivers/staging/comedi/drivers/comedi_8255.c unsigned long regbase) regbase 243 drivers/staging/comedi/drivers/comedi_8255.c return __subdev_8255_init(dev, s, io, regbase, true); regbase 259 drivers/staging/comedi/drivers/comedi_8255.c return spriv->regbase; regbase 483 drivers/staging/comedi/drivers/dmm32at.c int dir, int port, int data, unsigned long regbase) regbase 489 drivers/staging/comedi/drivers/dmm32at.c outb(data, dev->iobase + regbase + port); regbase 492 drivers/staging/comedi/drivers/dmm32at.c return inb(dev->iobase + regbase + port); regbase 179 drivers/staging/media/imx/imx7-media-csi.c void __iomem *regbase; regbase 200 drivers/staging/media/imx/imx7-media-csi.c return readl(csi->regbase + offset); regbase 206 drivers/staging/media/imx/imx7-media-csi.c writel(value, csi->regbase + offset); regbase 1215 drivers/staging/media/imx/imx7-media-csi.c csi->regbase = devm_platform_ioremap_resource(pdev, 0); regbase 1216 drivers/staging/media/imx/imx7-media-csi.c if (IS_ERR(csi->regbase)) regbase 1217 drivers/staging/media/imx/imx7-media-csi.c return PTR_ERR(csi->regbase); regbase 448 drivers/video/fbdev/aty/aty128fb.c void __iomem *regbase; /* remapped mmio */ regbase 534 drivers/video/fbdev/aty/aty128fb.c return readl (par->regbase + regindex); regbase 540 drivers/video/fbdev/aty/aty128fb.c writel (val, par->regbase + regindex); regbase 546 drivers/video/fbdev/aty/aty128fb.c return readb (par->regbase + regindex); regbase 552 drivers/video/fbdev/aty/aty128fb.c writeb (val, par->regbase + regindex); regbase 2097 drivers/video/fbdev/aty/aty128fb.c par->regbase = pci_ioremap_bar(pdev, 2); regbase 2098 drivers/video/fbdev/aty/aty128fb.c if (!par->regbase) regbase 2151 drivers/video/fbdev/aty/aty128fb.c iounmap(par->regbase); regbase 2180 drivers/video/fbdev/aty/aty128fb.c iounmap(par->regbase); regbase 356 drivers/video/fbdev/cirrusfb.c u8 __iomem *regbase; regbase 396 drivers/video/fbdev/cirrusfb.c static void cirrusfb_WaitBLT(u8 __iomem *regbase); regbase 397 drivers/video/fbdev/cirrusfb.c static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel, regbase 402 drivers/video/fbdev/cirrusfb.c static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, regbase 411 drivers/video/fbdev/cirrusfb.c static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase); regbase 413 drivers/video/fbdev/cirrusfb.c caddr_t regbase, regbase 452 drivers/video/fbdev/cirrusfb.c long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; regbase 638 drivers/video/fbdev/cirrusfb.c old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; regbase 644 drivers/video/fbdev/cirrusfb.c old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; regbase 648 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR1E, old1e); regbase 650 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR1F, old1f); regbase 662 drivers/video/fbdev/cirrusfb.c u8 __iomem *regbase = cinfo->regbase; regbase 748 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */ regbase 752 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal); regbase 755 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend); regbase 758 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8); regbase 762 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_H_BLANK_END, regbase 766 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart); regbase 772 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp); regbase 775 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff); regbase 793 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp); regbase 801 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp); regbase 804 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff); regbase 807 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32); regbase 810 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff); regbase 813 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff); regbase 816 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff); regbase 819 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff); regbase 834 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, CL_CRT1A, tmp); regbase 896 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRE, tmp); regbase 897 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR1E, nom); regbase 899 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRE, nom); regbase 900 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR1E, tmp); regbase 906 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_MODE, 0xc7); regbase 910 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_MODE, 0xc3); regbase 915 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_REGS, htotal / 2); regbase 917 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_REGS, 0x00); /* interlace control */ regbase 929 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_CURSOR_START, 0); regbase 931 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_CURSOR_END, 31); regbase 942 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, VGA_GFX_MODE, 0); /* mode register */ regbase 953 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, regbase 960 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, regbase 961 drivers/video/fbdev/cirrusfb.c vga_rseq(regbase, CL_SEQR7) & ~0x01); regbase 975 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xb0); regbase 980 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xd0); regbase 1006 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x06); regbase 1008 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0x01); regbase 1027 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, regbase 1034 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, regbase 1035 drivers/video/fbdev/cirrusfb.c vga_rseq(regbase, CL_SEQR7) | 0x01); regbase 1049 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xb0); regbase 1055 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xb8); regbase 1071 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, VGA_GFX_MODE, 64); regbase 1091 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, 0x87); regbase 1093 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xb0); regbase 1097 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, 0x27); regbase 1099 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xb0); regbase 1106 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, regbase 1111 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, 0x17); regbase 1117 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, regbase 1118 drivers/video/fbdev/cirrusfb.c vga_rseq(regbase, CL_SEQR7) & ~0x01); regbase 1130 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, VGA_GFX_MODE, 64); regbase 1150 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, 0x85); regbase 1152 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xb0); regbase 1156 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, 0x25); regbase 1158 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQRF, 0xb0); regbase 1165 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, 0xa5); regbase 1169 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, 0x15); regbase 1175 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, CL_SEQR7, regbase 1176 drivers/video/fbdev/cirrusfb.c vga_rseq(regbase, CL_SEQR7) & ~0x01); regbase 1188 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, VGA_GFX_MODE, 64); regbase 1205 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, VGA_CRTC_OFFSET, pitch & 0xff); regbase 1211 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, CL_CRT1B, tmp); regbase 1215 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, CL_CRT1D, (pitch >> 9) & 1); regbase 1232 drivers/video/fbdev/cirrusfb.c vga_wcrt(regbase, CL_CRT1E, tmp); regbase 1237 drivers/video/fbdev/cirrusfb.c vga_wattr(regbase, CL_AR33, 0); regbase 1258 drivers/video/fbdev/cirrusfb.c vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, tmp); regbase 1339 drivers/video/fbdev/cirrusfb.c cirrusfb_WaitBLT(cinfo->regbase); regbase 1342 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_START_LO, base & 0xff); regbase 1343 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_START_HI, (base >> 8) & 0xff); regbase 1346 drivers/video/fbdev/cirrusfb.c tmp = vga_rcrt(cinfo->regbase, CL_CRT1B) & 0xf2; regbase 1355 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, CL_CRT1B, tmp); regbase 1359 drivers/video/fbdev/cirrusfb.c tmp = vga_rcrt(cinfo->regbase, CL_CRT1D); regbase 1364 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, CL_CRT1D, tmp); regbase 1372 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, CL_AR33, xpix); regbase 1411 drivers/video/fbdev/cirrusfb.c val |= vga_rseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE) & 0xdf; regbase 1412 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, val); regbase 1433 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GRE, val); regbase 1476 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, CL_CRT51, 0x00); regbase 1479 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GR31, 0x00); regbase 1483 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GR2F, 0x00); regbase 1487 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GR33, 0x00); regbase 1516 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, VGA_SEQ_RESET, 0x03); regbase 1519 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, 0x21); regbase 1524 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR6, 0x12); regbase 1528 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQRF, 0x98); regbase 1536 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQRF, 0xb8); regbase 1540 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR16, 0x0f); regbase 1541 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQRF, 0xb0); regbase 1546 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, VGA_SEQ_PLANE_WRITE, 0xff); regbase 1548 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, VGA_SEQ_CHARACTER_MAP, 0x00); regbase 1550 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, VGA_SEQ_MEMORY_MODE, 0x0a); regbase 1554 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR7, bi->sr07); regbase 1560 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR10, 0x00); regbase 1562 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR11, 0x00); regbase 1564 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR12, 0x00); regbase 1566 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR13, 0x00); regbase 1571 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR17, 0x00); regbase 1573 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR18, 0x02); regbase 1577 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_PRESET_ROW, 0x00); regbase 1579 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_START, 0x20); regbase 1581 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_END, 0x00); regbase 1583 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_HI, 0x00); regbase 1585 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_LO, 0x00); regbase 1588 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, VGA_CRTC_UNDERLINE, 0x00); regbase 1591 drivers/video/fbdev/cirrusfb.c vga_wcrt(cinfo->regbase, CL_CRT1B, 0x02); regbase 1594 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_SR_VALUE, 0x00); regbase 1596 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_SR_ENABLE, 0x00); regbase 1598 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_VALUE, 0x00); regbase 1600 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_DATA_ROTATE, 0x00); regbase 1602 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_PLANE_READ, 0x00); regbase 1604 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_MODE, 0x00); regbase 1606 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_MISC, 0x01); regbase 1608 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_MASK, 0x0f); regbase 1610 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, VGA_GFX_BIT_MASK, 0xff); regbase 1615 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GRB, 0x20); regbase 1620 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GRB, 0x28); regbase 1622 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GRC, 0xff); /* Color Key compare: - */ regbase 1623 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GRD, 0x00); /* Color Key compare mask: - */ regbase 1624 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GRE, 0x00); /* Miscellaneous control: - */ regbase 1630 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE0, 0x00); regbase 1631 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE1, 0x01); regbase 1632 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE2, 0x02); regbase 1633 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE3, 0x03); regbase 1634 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE4, 0x04); regbase 1635 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE5, 0x05); regbase 1636 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE6, 0x06); regbase 1637 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE7, 0x07); regbase 1638 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE8, 0x08); regbase 1639 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTE9, 0x09); regbase 1640 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTEA, 0x0a); regbase 1641 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTEB, 0x0b); regbase 1642 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTEC, 0x0c); regbase 1643 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTED, 0x0d); regbase 1644 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTEE, 0x0e); regbase 1645 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PALETTEF, 0x0f); regbase 1648 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_MODE, 0x01); regbase 1650 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_OVERSCAN, 0x00); regbase 1652 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_PLANE_ENABLE, 0x0f); regbase 1654 drivers/video/fbdev/cirrusfb.c vga_wattr(cinfo->regbase, VGA_ATC_COLOR_PAGE, 0x00); regbase 1659 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GR31, 0x04); regbase 1661 drivers/video/fbdev/cirrusfb.c vga_wgfx(cinfo->regbase, CL_GR31, 0x00); regbase 1724 drivers/video/fbdev/cirrusfb.c while (vga_rgfx(cinfo->regbase, CL_GR31) & 0x03) regbase 1761 drivers/video/fbdev/cirrusfb.c cirrusfb_RectFill(cinfo->regbase, regbase 1802 drivers/video/fbdev/cirrusfb.c cirrusfb_BitBLT(cinfo->regbase, info->var.bits_per_pixel, regbase 1838 drivers/video/fbdev/cirrusfb.c cirrusfb_RectFill(cinfo->regbase, regbase 1846 drivers/video/fbdev/cirrusfb.c cirrusfb_RectFill(cinfo->regbase, regbase 1864 drivers/video/fbdev/cirrusfb.c u8 __iomem *regbase) regbase 1870 drivers/video/fbdev/cirrusfb.c unsigned char SR14 = vga_rseq(regbase, CL_SEQR14); regbase 1874 drivers/video/fbdev/cirrusfb.c unsigned char SRF = vga_rseq(regbase, CL_SEQRF); regbase 1952 drivers/video/fbdev/cirrusfb.c iounmap(cinfo->regbase); regbase 2113 drivers/video/fbdev/cirrusfb.c cinfo->regbase = NULL; regbase 2120 drivers/video/fbdev/cirrusfb.c 32 * MB_ : cirrusfb_get_memsize(info, cinfo->regbase); regbase 2204 drivers/video/fbdev/cirrusfb.c unsigned long regbase, ramsize, rambase; regbase 2213 drivers/video/fbdev/cirrusfb.c regbase = zorro_resource_start(z) + zcl->regoffset; regbase 2244 drivers/video/fbdev/cirrusfb.c cirrusfb_board_info[btype].name, regbase, ramsize / MB_, regbase 2256 drivers/video/fbdev/cirrusfb.c info->fix.mmio_start = regbase; regbase 2257 drivers/video/fbdev/cirrusfb.c cinfo->regbase = regbase > 16 * MB_ ? ioremap(regbase, 64 * 1024) regbase 2258 drivers/video/fbdev/cirrusfb.c : ZTWO_VADDR(regbase); regbase 2259 drivers/video/fbdev/cirrusfb.c if (!cinfo->regbase) { regbase 2283 drivers/video/fbdev/cirrusfb.c vga_wseq(cinfo->regbase, CL_SEQR1F, regbase 2301 drivers/video/fbdev/cirrusfb.c if (regbase > 16 * MB_) regbase 2302 drivers/video/fbdev/cirrusfb.c iounmap(cinfo->regbase); regbase 2420 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, regofs + regnum, val); regbase 2436 drivers/video/fbdev/cirrusfb.c return vga_r(cinfo->regbase, regofs + regnum); regbase 2444 drivers/video/fbdev/cirrusfb.c if (vga_rcrt(cinfo->regbase, CL_CRT24) & 0x80) { regbase 2447 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, VGA_ATT_IW, regbase 2448 drivers/video/fbdev/cirrusfb.c vga_r(cinfo->regbase, VGA_ATT_R)); regbase 2452 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, VGA_ATT_IW, 0x33); regbase 2455 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, VGA_ATT_IW, 0x00); regbase 2509 drivers/video/fbdev/cirrusfb.c assert(cinfo->regbase != NULL); regbase 2511 drivers/video/fbdev/cirrusfb.c z_writeb(val, cinfo->regbase + 0x8000); regbase 2521 drivers/video/fbdev/cirrusfb.c assert(cinfo->regbase != NULL); regbase 2523 drivers/video/fbdev/cirrusfb.c z_writeb(val, cinfo->regbase + 0x9000); regbase 2534 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, VGA_PEL_IW, regnum); regbase 2542 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, data, red); regbase 2543 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, data, green); regbase 2544 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, data, blue); regbase 2546 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, data, blue); regbase 2547 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, data, green); regbase 2548 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, data, red); regbase 2559 drivers/video/fbdev/cirrusfb.c vga_w(cinfo->regbase, VGA_PEL_IR, regnum); regbase 2565 drivers/video/fbdev/cirrusfb.c *red = vga_r(cinfo->regbase, data); regbase 2566 drivers/video/fbdev/cirrusfb.c *green = vga_r(cinfo->regbase, data); regbase 2567 drivers/video/fbdev/cirrusfb.c *blue = vga_r(cinfo->regbase, data); regbase 2569 drivers/video/fbdev/cirrusfb.c *blue = vga_r(cinfo->regbase, data); regbase 2570 drivers/video/fbdev/cirrusfb.c *green = vga_r(cinfo->regbase, data); regbase 2571 drivers/video/fbdev/cirrusfb.c *red = vga_r(cinfo->regbase, data); regbase 2583 drivers/video/fbdev/cirrusfb.c static void cirrusfb_WaitBLT(u8 __iomem *regbase) regbase 2585 drivers/video/fbdev/cirrusfb.c while (vga_rgfx(regbase, CL_GR31) & 0x08) regbase 2595 drivers/video/fbdev/cirrusfb.c static void cirrusfb_set_blitter(u8 __iomem *regbase, regbase 2603 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR24, line_length & 0xff); regbase 2605 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR25, line_length >> 8); regbase 2607 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR26, line_length & 0xff); regbase 2609 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR27, line_length >> 8); regbase 2613 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR20, nwidth & 0xff); regbase 2615 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR21, nwidth >> 8); regbase 2619 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR22, nheight & 0xff); regbase 2621 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR23, nheight >> 8); regbase 2625 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR28, (u_char) (ndest & 0xff)); regbase 2627 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR29, (u_char) (ndest >> 8)); regbase 2629 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR2A, (u_char) (ndest >> 16)); regbase 2633 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR2C, (u_char) (nsrc & 0xff)); regbase 2635 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR2D, (u_char) (nsrc >> 8)); regbase 2637 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR2E, (u_char) (nsrc >> 16)); regbase 2640 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR30, bltmode); /* BLT mode */ regbase 2643 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR32, 0x0d); /* BLT ROP */ regbase 2646 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */ regbase 2655 drivers/video/fbdev/cirrusfb.c static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel, regbase 2687 drivers/video/fbdev/cirrusfb.c cirrusfb_WaitBLT(regbase); regbase 2689 drivers/video/fbdev/cirrusfb.c cirrusfb_set_blitter(regbase, nwidth, nheight, regbase 2699 drivers/video/fbdev/cirrusfb.c static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, regbase 2707 drivers/video/fbdev/cirrusfb.c cirrusfb_WaitBLT(regbase); regbase 2711 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, VGA_GFX_SR_VALUE, bg_color); regbase 2712 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, VGA_GFX_SR_ENABLE, fg_color); regbase 2716 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR10, bg_color >> 8); regbase 2717 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR11, fg_color >> 8); regbase 2721 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR12, bg_color >> 16); regbase 2722 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR13, fg_color >> 16); regbase 2726 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR14, bg_color >> 24); regbase 2727 drivers/video/fbdev/cirrusfb.c vga_wgfx(regbase, CL_GR15, fg_color >> 24); regbase 2730 drivers/video/fbdev/cirrusfb.c cirrusfb_set_blitter(regbase, width - 1, height - 1, regbase 2815 drivers/video/fbdev/cirrusfb.c caddr_t regbase, regbase 2831 drivers/video/fbdev/cirrusfb.c val = vga_rcrt(regbase, (unsigned char) reg); regbase 2834 drivers/video/fbdev/cirrusfb.c val = vga_rseq(regbase, (unsigned char) reg); regbase 2860 drivers/video/fbdev/cirrusfb.c static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase) regbase 2864 drivers/video/fbdev/cirrusfb.c cirrusfb_dbg_print_regs(info, regbase, CRT, regbase 2918 drivers/video/fbdev/cirrusfb.c cirrusfb_dbg_print_regs(info, regbase, SEQ, regbase 23 drivers/video/fbdev/core/svgalib.c void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) regbase 28 drivers/video/fbdev/core/svgalib.c regval = vga_rcrt(regbase, regset->regnum); regbase 37 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, regset->regnum, regval); regbase 43 drivers/video/fbdev/core/svgalib.c void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) regbase 48 drivers/video/fbdev/core/svgalib.c regval = vga_rseq(regbase, regset->regnum); regbase 57 drivers/video/fbdev/core/svgalib.c vga_wseq(regbase, regset->regnum, regval); regbase 78 drivers/video/fbdev/core/svgalib.c void svga_set_default_gfx_regs(void __iomem *regbase) regbase 81 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_SR_VALUE, 0x00); regbase 82 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_SR_ENABLE, 0x00); regbase 83 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_COMPARE_VALUE, 0x00); regbase 84 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_DATA_ROTATE, 0x00); regbase 85 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_PLANE_READ, 0x00); regbase 86 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_MODE, 0x00); regbase 89 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_MISC, 0x05); regbase 91 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_COMPARE_MASK, 0x0F); regbase 92 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_BIT_MASK, 0xFF); regbase 96 drivers/video/fbdev/core/svgalib.c void svga_set_default_atc_regs(void __iomem *regbase) regbase 100 drivers/video/fbdev/core/svgalib.c vga_r(regbase, 0x3DA); regbase 101 drivers/video/fbdev/core/svgalib.c vga_w(regbase, VGA_ATT_W, 0x00); regbase 105 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, count, count); regbase 107 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, VGA_ATC_MODE, 0x01); regbase 109 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, VGA_ATC_OVERSCAN, 0x00); regbase 110 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, VGA_ATC_PLANE_ENABLE, 0x0F); regbase 111 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, VGA_ATC_PEL, 0x00); regbase 112 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, VGA_ATC_COLOR_PAGE, 0x00); regbase 114 drivers/video/fbdev/core/svgalib.c vga_r(regbase, 0x3DA); regbase 115 drivers/video/fbdev/core/svgalib.c vga_w(regbase, VGA_ATT_W, 0x20); regbase 119 drivers/video/fbdev/core/svgalib.c void svga_set_default_seq_regs(void __iomem *regbase) regbase 122 drivers/video/fbdev/core/svgalib.c vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, VGA_SR01_CHAR_CLK_8DOTS); regbase 123 drivers/video/fbdev/core/svgalib.c vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, VGA_SR02_ALL_PLANES); regbase 124 drivers/video/fbdev/core/svgalib.c vga_wseq(regbase, VGA_SEQ_CHARACTER_MAP, 0x00); regbase 126 drivers/video/fbdev/core/svgalib.c vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE); regbase 130 drivers/video/fbdev/core/svgalib.c void svga_set_default_crt_regs(void __iomem *regbase) regbase 133 drivers/video/fbdev/core/svgalib.c svga_wcrt_mask(regbase, 0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ regbase 134 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_PRESET_ROW, 0); regbase 135 drivers/video/fbdev/core/svgalib.c svga_wcrt_mask(regbase, VGA_CRTC_MAX_SCAN, 0, 0x1F); regbase 136 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_UNDERLINE, 0); regbase 137 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_MODE, 0xE3); regbase 140 drivers/video/fbdev/core/svgalib.c void svga_set_textmode_vga_regs(void __iomem *regbase) regbase 143 drivers/video/fbdev/core/svgalib.c vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); regbase 144 drivers/video/fbdev/core/svgalib.c vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0x03); regbase 146 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */ regbase 147 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_UNDERLINE, 0x1f); regbase 148 drivers/video/fbdev/core/svgalib.c svga_wcrt_mask(regbase, VGA_CRTC_MODE, 0x23, 0x7f); regbase 150 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_CURSOR_START, 0x0d); regbase 151 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_CURSOR_END, 0x0e); regbase 152 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_CURSOR_HI, 0x00); regbase 153 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, VGA_CRTC_CURSOR_LO, 0x00); regbase 155 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_MODE, 0x10); /* Odd/even memory mode */ regbase 156 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_MISC, 0x0E); /* Misc graphics register - text mode enable */ regbase 157 drivers/video/fbdev/core/svgalib.c vga_wgfx(regbase, VGA_GFX_COMPARE_MASK, 0x00); regbase 159 drivers/video/fbdev/core/svgalib.c vga_r(regbase, 0x3DA); regbase 160 drivers/video/fbdev/core/svgalib.c vga_w(regbase, VGA_ATT_W, 0x00); regbase 162 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, 0x10, 0x0C); /* Attribute Mode Control Register - text mode, blinking and line graphics */ regbase 163 drivers/video/fbdev/core/svgalib.c svga_wattr(regbase, 0x13, 0x08); /* Horizontal Pixel Panning Register */ regbase 165 drivers/video/fbdev/core/svgalib.c vga_r(regbase, 0x3DA); regbase 166 drivers/video/fbdev/core/svgalib.c vga_w(regbase, VGA_ATT_W, 0x20); regbase 302 drivers/video/fbdev/core/svgalib.c void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor) regbase 313 drivers/video/fbdev/core/svgalib.c svga_wcrt_mask(regbase, 0x0A, 0x20, 0x20); /* disable cursor */ regbase 337 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, 0x0E, pos >> 8); regbase 338 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, 0x0F, pos & 0xFF); regbase 340 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, 0x0B, ce); /* set cursor end */ regbase 341 drivers/video/fbdev/core/svgalib.c vga_wcrt(regbase, 0x0A, cs); /* set cursor start and enable it */ regbase 510 drivers/video/fbdev/core/svgalib.c void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, regbase 520 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->h_total_regs, (value / 8) - 5); regbase 525 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->h_display_regs, (value / 8) - 1); regbase 530 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->h_blank_start_regs, (value / 8) - 1 + hborder); regbase 535 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->h_blank_end_regs, (value / 8) - 1 - hborder); regbase 540 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->h_sync_start_regs, (value / 8)); regbase 545 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->h_sync_end_regs, (value / 8)); regbase 550 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->v_total_regs, value - 2); regbase 555 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->v_display_regs, value - 1); regbase 560 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->v_blank_start_regs, value); regbase 565 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->v_blank_end_regs, value - 2); regbase 570 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->v_sync_start_regs, value); regbase 575 drivers/video/fbdev/core/svgalib.c svga_wcrt_multi(regbase, tm->v_sync_end_regs, value); regbase 579 drivers/video/fbdev/core/svgalib.c regval = vga_r(regbase, VGA_MIS_R); regbase 594 drivers/video/fbdev/core/svgalib.c vga_w(regbase, VGA_MIS_W, regval); regbase 685 drivers/video/fbdev/kyro/fbdev.c currentpar->regbase = deviceInfo.pSTGReg = regbase 687 drivers/video/fbdev/kyro/fbdev.c if (!currentpar->regbase) regbase 742 drivers/video/fbdev/kyro/fbdev.c iounmap(currentpar->regbase); regbase 765 drivers/video/fbdev/kyro/fbdev.c iounmap(par->regbase); regbase 112 drivers/video/fbdev/vt8500lcdfb.c control0 = readl(fbi->regbase) & ~0xf; regbase 113 drivers/video/fbdev/vt8500lcdfb.c writel(0, fbi->regbase); regbase 114 drivers/video/fbdev/vt8500lcdfb.c while (readl(fbi->regbase + 0x38) & 0x10) regbase 119 drivers/video/fbdev/vt8500lcdfb.c | (info->var.right_margin & 0xff), fbi->regbase + 0x4); regbase 123 drivers/video/fbdev/vt8500lcdfb.c | (info->var.lower_margin & 0xff), fbi->regbase + 0x8); regbase 125 drivers/video/fbdev/vt8500lcdfb.c | ((info->var.xres - 1) & 0x400), fbi->regbase + 0x10); regbase 126 drivers/video/fbdev/vt8500lcdfb.c writel(0x80000000, fbi->regbase + 0x20); regbase 127 drivers/video/fbdev/vt8500lcdfb.c writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); regbase 186 drivers/video/fbdev/vt8500lcdfb.c writel(0xffffffff ^ (1 << 3), fbi->regbase + 0x3c); regbase 188 drivers/video/fbdev/vt8500lcdfb.c readl(fbi->regbase + 0x38) & (1 << 3), HZ / 10); regbase 190 drivers/video/fbdev/vt8500lcdfb.c writel(0xffffffff, fbi->regbase + 0x3c); regbase 210 drivers/video/fbdev/vt8500lcdfb.c | (off >> 2), fbi->regbase + 0x20); regbase 259 drivers/video/fbdev/vt8500lcdfb.c if (readl(fbi->regbase + 0x38) & (1 << 3)) regbase 262 drivers/video/fbdev/vt8500lcdfb.c writel(0xffffffff, fbi->regbase + 0x38); regbase 327 drivers/video/fbdev/vt8500lcdfb.c fbi->regbase = ioremap(res->start, resource_size(res)); regbase 328 drivers/video/fbdev/vt8500lcdfb.c if (fbi->regbase == NULL) { regbase 408 drivers/video/fbdev/vt8500lcdfb.c writel(fbi->fb.fix.smem_start >> 22, fbi->regbase + 0x1c); regbase 409 drivers/video/fbdev/vt8500lcdfb.c writel((fbi->palette_phys & 0xfffffe00) | 1, fbi->regbase + 0x18); regbase 423 drivers/video/fbdev/vt8500lcdfb.c writel(readl(fbi->regbase) | 1, fbi->regbase); regbase 436 drivers/video/fbdev/vt8500lcdfb.c iounmap(fbi->regbase); regbase 450 drivers/video/fbdev/vt8500lcdfb.c writel(0, fbi->regbase); regbase 461 drivers/video/fbdev/vt8500lcdfb.c iounmap(fbi->regbase); regbase 10 drivers/video/fbdev/vt8500lcdfb.h void __iomem *regbase; regbase 38 drivers/video/fbdev/wm8505fb.c void __iomem *regbase; regbase 51 drivers/video/fbdev/wm8505fb.c writel(0, fbi->regbase + i); regbase 54 drivers/video/fbdev/wm8505fb.c writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR); regbase 55 drivers/video/fbdev/wm8505fb.c writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1); regbase 62 drivers/video/fbdev/wm8505fb.c writel(0x31c, fbi->regbase + WMT_GOVR_COLORSPACE); regbase 63 drivers/video/fbdev/wm8505fb.c writel(1, fbi->regbase + WMT_GOVR_COLORSPACE1); regbase 66 drivers/video/fbdev/wm8505fb.c writel(info->var.xres, fbi->regbase + WMT_GOVR_XRES); regbase 67 drivers/video/fbdev/wm8505fb.c writel(info->var.xres_virtual, fbi->regbase + WMT_GOVR_XRES_VIRTUAL); regbase 70 drivers/video/fbdev/wm8505fb.c writel(0xf, fbi->regbase + WMT_GOVR_FHI); regbase 71 drivers/video/fbdev/wm8505fb.c writel(4, fbi->regbase + WMT_GOVR_DVO_SET); regbase 72 drivers/video/fbdev/wm8505fb.c writel(1, fbi->regbase + WMT_GOVR_MIF_ENABLE); regbase 73 drivers/video/fbdev/wm8505fb.c writel(1, fbi->regbase + WMT_GOVR_REG_UPDATE); regbase 92 drivers/video/fbdev/wm8505fb.c writel(0, fbi->regbase + WMT_GOVR_TG); regbase 94 drivers/video/fbdev/wm8505fb.c writel(h_start, fbi->regbase + WMT_GOVR_TIMING_H_START); regbase 95 drivers/video/fbdev/wm8505fb.c writel(h_end, fbi->regbase + WMT_GOVR_TIMING_H_END); regbase 96 drivers/video/fbdev/wm8505fb.c writel(h_all, fbi->regbase + WMT_GOVR_TIMING_H_ALL); regbase 97 drivers/video/fbdev/wm8505fb.c writel(h_sync, fbi->regbase + WMT_GOVR_TIMING_H_SYNC); regbase 99 drivers/video/fbdev/wm8505fb.c writel(v_start, fbi->regbase + WMT_GOVR_TIMING_V_START); regbase 100 drivers/video/fbdev/wm8505fb.c writel(v_end, fbi->regbase + WMT_GOVR_TIMING_V_END); regbase 101 drivers/video/fbdev/wm8505fb.c writel(v_all, fbi->regbase + WMT_GOVR_TIMING_V_ALL); regbase 102 drivers/video/fbdev/wm8505fb.c writel(v_sync, fbi->regbase + WMT_GOVR_TIMING_V_SYNC); regbase 104 drivers/video/fbdev/wm8505fb.c writel(1, fbi->regbase + WMT_GOVR_TG); regbase 146 drivers/video/fbdev/wm8505fb.c fbi->regbase + WMT_GOVR_CONTRAST); regbase 228 drivers/video/fbdev/wm8505fb.c writel(var->xoffset, fbi->regbase + WMT_GOVR_XPAN); regbase 229 drivers/video/fbdev/wm8505fb.c writel(var->yoffset, fbi->regbase + WMT_GOVR_YPAN); regbase 242 drivers/video/fbdev/wm8505fb.c writel(0, fbi->regbase + WMT_GOVR_TIMING_V_SYNC); regbase 303 drivers/video/fbdev/wm8505fb.c fbi->regbase = devm_ioremap_resource(&pdev->dev, res); regbase 304 drivers/video/fbdev/wm8505fb.c if (IS_ERR(fbi->regbase)) regbase 305 drivers/video/fbdev/wm8505fb.c return PTR_ERR(fbi->regbase); regbase 383 drivers/video/fbdev/wm8505fb.c writel(0, fbi->regbase); regbase 39 drivers/video/fbdev/wmt_ge_rops.c static void __iomem *regbase; regbase 60 drivers/video/fbdev/wmt_ge_rops.c (p->var.bits_per_pixel == 8 ? 0 : 1), regbase + GE_DEPTH_OFF); regbase 61 drivers/video/fbdev/wmt_ge_rops.c writel(p->var.bits_per_pixel == 15 ? 1 : 0, regbase + GE_HIGHCOLOR_OFF); regbase 62 drivers/video/fbdev/wmt_ge_rops.c writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF); regbase 63 drivers/video/fbdev/wmt_ge_rops.c writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF); regbase 64 drivers/video/fbdev/wmt_ge_rops.c writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF); regbase 65 drivers/video/fbdev/wmt_ge_rops.c writel(rect->dx, regbase + GE_DESTAREAX_OFF); regbase 66 drivers/video/fbdev/wmt_ge_rops.c writel(rect->dy, regbase + GE_DESTAREAY_OFF); regbase 67 drivers/video/fbdev/wmt_ge_rops.c writel(rect->width - 1, regbase + GE_DESTAREAW_OFF); regbase 68 drivers/video/fbdev/wmt_ge_rops.c writel(rect->height - 1, regbase + GE_DESTAREAH_OFF); regbase 70 drivers/video/fbdev/wmt_ge_rops.c writel(pat, regbase + GE_PAT0C_OFF); regbase 71 drivers/video/fbdev/wmt_ge_rops.c writel(1, regbase + GE_COMMAND_OFF); regbase 72 drivers/video/fbdev/wmt_ge_rops.c writel(rect->rop == ROP_XOR ? 0x5a : 0xf0, regbase + GE_ROPCODE_OFF); regbase 73 drivers/video/fbdev/wmt_ge_rops.c writel(1, regbase + GE_FIRE_OFF); regbase 86 drivers/video/fbdev/wmt_ge_rops.c (p->var.bits_per_pixel > 8 ? 1 : 0), regbase + GE_DEPTH_OFF); regbase 88 drivers/video/fbdev/wmt_ge_rops.c writel(p->fix.smem_start, regbase + GE_SRCBASE_OFF); regbase 89 drivers/video/fbdev/wmt_ge_rops.c writel(p->var.xres_virtual - 1, regbase + GE_SRCDISPW_OFF); regbase 90 drivers/video/fbdev/wmt_ge_rops.c writel(p->var.yres_virtual - 1, regbase + GE_SRCDISPH_OFF); regbase 91 drivers/video/fbdev/wmt_ge_rops.c writel(area->sx, regbase + GE_SRCAREAX_OFF); regbase 92 drivers/video/fbdev/wmt_ge_rops.c writel(area->sy, regbase + GE_SRCAREAY_OFF); regbase 93 drivers/video/fbdev/wmt_ge_rops.c writel(area->width - 1, regbase + GE_SRCAREAW_OFF); regbase 94 drivers/video/fbdev/wmt_ge_rops.c writel(area->height - 1, regbase + GE_SRCAREAH_OFF); regbase 96 drivers/video/fbdev/wmt_ge_rops.c writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF); regbase 97 drivers/video/fbdev/wmt_ge_rops.c writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF); regbase 98 drivers/video/fbdev/wmt_ge_rops.c writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF); regbase 99 drivers/video/fbdev/wmt_ge_rops.c writel(area->dx, regbase + GE_DESTAREAX_OFF); regbase 100 drivers/video/fbdev/wmt_ge_rops.c writel(area->dy, regbase + GE_DESTAREAY_OFF); regbase 101 drivers/video/fbdev/wmt_ge_rops.c writel(area->width - 1, regbase + GE_DESTAREAW_OFF); regbase 102 drivers/video/fbdev/wmt_ge_rops.c writel(area->height - 1, regbase + GE_DESTAREAH_OFF); regbase 104 drivers/video/fbdev/wmt_ge_rops.c writel(0xcc, regbase + GE_ROPCODE_OFF); regbase 105 drivers/video/fbdev/wmt_ge_rops.c writel(1, regbase + GE_COMMAND_OFF); regbase 106 drivers/video/fbdev/wmt_ge_rops.c writel(1, regbase + GE_FIRE_OFF); regbase 113 drivers/video/fbdev/wmt_ge_rops.c while ((readl(regbase + GE_STATUS_OFF) & 4) && --loops) regbase 130 drivers/video/fbdev/wmt_ge_rops.c if (unlikely(regbase)) { regbase 135 drivers/video/fbdev/wmt_ge_rops.c regbase = ioremap(res->start, resource_size(res)); regbase 136 drivers/video/fbdev/wmt_ge_rops.c if (regbase == NULL) { regbase 141 drivers/video/fbdev/wmt_ge_rops.c writel(1, regbase + GE_ENABLE_OFF); regbase 149 drivers/video/fbdev/wmt_ge_rops.c iounmap(regbase); regbase 34 drivers/video/vgastate.c static inline unsigned char vga_rcrtcs(void __iomem *regbase, unsigned short iobase, regbase 37 drivers/video/vgastate.c vga_w(regbase, iobase + 0x4, reg); regbase 38 drivers/video/vgastate.c return vga_r(regbase, iobase + 0x5); regbase 41 drivers/video/vgastate.c static inline void vga_wcrtcs(void __iomem *regbase, unsigned short iobase, regbase 44 drivers/video/vgastate.c vga_w(regbase, iobase + 0x4, reg); regbase 45 drivers/video/vgastate.c vga_w(regbase, iobase + 0x5, val); regbase 44 include/linux/platform_data/mv_usb.h int (*phy_init)(void __iomem *regbase); regbase 45 include/linux/platform_data/mv_usb.h void (*phy_deinit)(void __iomem *regbase); regbase 71 include/linux/svga.h static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data) regbase 73 include/linux/svga.h vga_r(regbase, VGA_IS1_RC); regbase 74 include/linux/svga.h vga_w(regbase, VGA_ATT_IW, index); regbase 75 include/linux/svga.h vga_w(regbase, VGA_ATT_W, data); regbase 80 include/linux/svga.h static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) regbase 82 include/linux/svga.h vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask)); regbase 87 include/linux/svga.h static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) regbase 89 include/linux/svga.h vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask)); regbase 100 include/linux/svga.h void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); regbase 101 include/linux/svga.h void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); regbase 103 include/linux/svga.h void svga_set_default_gfx_regs(void __iomem *regbase); regbase 104 include/linux/svga.h void svga_set_default_atc_regs(void __iomem *regbase); regbase 105 include/linux/svga.h void svga_set_default_seq_regs(void __iomem *regbase); regbase 106 include/linux/svga.h void svga_set_default_crt_regs(void __iomem *regbase); regbase 107 include/linux/svga.h void svga_set_textmode_vga_regs(void __iomem *regbase); regbase 113 include/linux/svga.h void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor); regbase 120 include/linux/svga.h void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node); regbase 334 include/sound/soc.h {.regbase = xregbase, .regcount = xregcount, .nbits = xnbits, \ regbase 1195 include/sound/soc.h unsigned int regbase, regcount, nbits, invert; regbase 16 include/video/kyro.h void __iomem *regbase; regbase 218 include/video/vga.h static inline unsigned char vga_mm_r (void __iomem *regbase, unsigned short port) regbase 220 include/video/vga.h return readb (regbase + port); regbase 223 include/video/vga.h static inline void vga_mm_w (void __iomem *regbase, unsigned short port, unsigned char val) regbase 225 include/video/vga.h writeb (val, regbase + port); regbase 228 include/video/vga.h static inline void vga_mm_w_fast (void __iomem *regbase, unsigned short port, regbase 231 include/video/vga.h writew (VGA_OUT16VAL (val, reg), regbase + port); regbase 234 include/video/vga.h static inline unsigned char vga_r (void __iomem *regbase, unsigned short port) regbase 236 include/video/vga.h if (regbase) regbase 237 include/video/vga.h return vga_mm_r (regbase, port); regbase 242 include/video/vga.h static inline void vga_w (void __iomem *regbase, unsigned short port, unsigned char val) regbase 244 include/video/vga.h if (regbase) regbase 245 include/video/vga.h vga_mm_w (regbase, port, val); regbase 251 include/video/vga.h static inline void vga_w_fast (void __iomem *regbase, unsigned short port, regbase 254 include/video/vga.h if (regbase) regbase 255 include/video/vga.h vga_mm_w_fast (regbase, port, reg, val); regbase 265 include/video/vga.h static inline unsigned char vga_rcrt (void __iomem *regbase, unsigned char reg) regbase 267 include/video/vga.h vga_w (regbase, VGA_CRT_IC, reg); regbase 268 include/video/vga.h return vga_r (regbase, VGA_CRT_DC); regbase 271 include/video/vga.h static inline void vga_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 274 include/video/vga.h vga_w_fast (regbase, VGA_CRT_IC, reg, val); regbase 276 include/video/vga.h vga_w (regbase, VGA_CRT_IC, reg); regbase 277 include/video/vga.h vga_w (regbase, VGA_CRT_DC, val); regbase 297 include/video/vga.h static inline unsigned char vga_mm_rcrt (void __iomem *regbase, unsigned char reg) regbase 299 include/video/vga.h vga_mm_w (regbase, VGA_CRT_IC, reg); regbase 300 include/video/vga.h return vga_mm_r (regbase, VGA_CRT_DC); regbase 303 include/video/vga.h static inline void vga_mm_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 306 include/video/vga.h vga_mm_w_fast (regbase, VGA_CRT_IC, reg, val); regbase 308 include/video/vga.h vga_mm_w (regbase, VGA_CRT_IC, reg); regbase 309 include/video/vga.h vga_mm_w (regbase, VGA_CRT_DC, val); regbase 318 include/video/vga.h static inline unsigned char vga_rseq (void __iomem *regbase, unsigned char reg) regbase 320 include/video/vga.h vga_w (regbase, VGA_SEQ_I, reg); regbase 321 include/video/vga.h return vga_r (regbase, VGA_SEQ_D); regbase 324 include/video/vga.h static inline void vga_wseq (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 327 include/video/vga.h vga_w_fast (regbase, VGA_SEQ_I, reg, val); regbase 329 include/video/vga.h vga_w (regbase, VGA_SEQ_I, reg); regbase 330 include/video/vga.h vga_w (regbase, VGA_SEQ_D, val); regbase 350 include/video/vga.h static inline unsigned char vga_mm_rseq (void __iomem *regbase, unsigned char reg) regbase 352 include/video/vga.h vga_mm_w (regbase, VGA_SEQ_I, reg); regbase 353 include/video/vga.h return vga_mm_r (regbase, VGA_SEQ_D); regbase 356 include/video/vga.h static inline void vga_mm_wseq (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 359 include/video/vga.h vga_mm_w_fast (regbase, VGA_SEQ_I, reg, val); regbase 361 include/video/vga.h vga_mm_w (regbase, VGA_SEQ_I, reg); regbase 362 include/video/vga.h vga_mm_w (regbase, VGA_SEQ_D, val); regbase 370 include/video/vga.h static inline unsigned char vga_rgfx (void __iomem *regbase, unsigned char reg) regbase 372 include/video/vga.h vga_w (regbase, VGA_GFX_I, reg); regbase 373 include/video/vga.h return vga_r (regbase, VGA_GFX_D); regbase 376 include/video/vga.h static inline void vga_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 379 include/video/vga.h vga_w_fast (regbase, VGA_GFX_I, reg, val); regbase 381 include/video/vga.h vga_w (regbase, VGA_GFX_I, reg); regbase 382 include/video/vga.h vga_w (regbase, VGA_GFX_D, val); regbase 402 include/video/vga.h static inline unsigned char vga_mm_rgfx (void __iomem *regbase, unsigned char reg) regbase 404 include/video/vga.h vga_mm_w (regbase, VGA_GFX_I, reg); regbase 405 include/video/vga.h return vga_mm_r (regbase, VGA_GFX_D); regbase 408 include/video/vga.h static inline void vga_mm_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 411 include/video/vga.h vga_mm_w_fast (regbase, VGA_GFX_I, reg, val); regbase 413 include/video/vga.h vga_mm_w (regbase, VGA_GFX_I, reg); regbase 414 include/video/vga.h vga_mm_w (regbase, VGA_GFX_D, val); regbase 423 include/video/vga.h static inline unsigned char vga_rattr (void __iomem *regbase, unsigned char reg) regbase 425 include/video/vga.h vga_w (regbase, VGA_ATT_IW, reg); regbase 426 include/video/vga.h return vga_r (regbase, VGA_ATT_R); regbase 429 include/video/vga.h static inline void vga_wattr (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 431 include/video/vga.h vga_w (regbase, VGA_ATT_IW, reg); regbase 432 include/video/vga.h vga_w (regbase, VGA_ATT_W, val); regbase 447 include/video/vga.h static inline unsigned char vga_mm_rattr (void __iomem *regbase, unsigned char reg) regbase 449 include/video/vga.h vga_mm_w (regbase, VGA_ATT_IW, reg); regbase 450 include/video/vga.h return vga_mm_r (regbase, VGA_ATT_R); regbase 453 include/video/vga.h static inline void vga_mm_wattr (void __iomem *regbase, unsigned char reg, unsigned char val) regbase 455 include/video/vga.h vga_mm_w (regbase, VGA_ATT_IW, reg); regbase 456 include/video/vga.h vga_mm_w (regbase, VGA_ATT_W, val); regbase 832 sound/soc/soc-ops.c unsigned int regbase = mc->regbase; regbase 846 sound/soc/soc-ops.c ret = snd_soc_component_read(component, regbase+i, ®val); regbase 881 sound/soc/soc-ops.c unsigned int regbase = mc->regbase; regbase 898 sound/soc/soc-ops.c err = snd_soc_component_update_bits(component, regbase+i, regbase 76 sound/soc/zte/zx-tdm.c void __iomem *regbase; regbase 85 sound/soc/zte/zx-tdm.c return readl_relaxed(tdm->regbase + reg); regbase 90 sound/soc/zte/zx-tdm.c writel_relaxed(val, tdm->regbase + reg); regbase 403 sound/soc/zte/zx-tdm.c zx_tdm->regbase = devm_ioremap_resource(&pdev->dev, res); regbase 404 sound/soc/zte/zx-tdm.c if (IS_ERR(zx_tdm->regbase)) regbase 405 sound/soc/zte/zx-tdm.c return PTR_ERR(zx_tdm->regbase);