reg_val_GCR       218 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_GCR;
reg_val_GCR       225 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       226 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR & ~SRG_ENABLE, msp->registers + MSP_GCR);
reg_val_GCR       264 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       265 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | SRG_ENABLE, msp->registers + MSP_GCR);
reg_val_GCR       353 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_DMACR, reg_val_GCR;
reg_val_GCR       390 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       391 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | FRAME_GEN_ENABLE, msp->registers + MSP_GCR);
reg_val_GCR       398 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_DR, reg_val_GCR, reg_val_FLR;
reg_val_GCR       401 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       402 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | RX_ENABLE, msp->registers + MSP_GCR);
reg_val_GCR       410 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR, msp->registers + MSP_GCR);
reg_val_GCR       415 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_TSTDR, reg_val_GCR, reg_val_FLR;
reg_val_GCR       418 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       419 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | TX_ENABLE, msp->registers + MSP_GCR);
reg_val_GCR       428 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR, msp->registers + MSP_GCR);
reg_val_GCR       503 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_GCR, reg_val_DMACR, reg_val_IMSC;
reg_val_GCR       505 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       506 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR & ~RX_ENABLE, msp->registers + MSP_GCR);
reg_val_GCR       519 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_GCR, reg_val_DMACR, reg_val_IMSC;
reg_val_GCR       521 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       522 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR & ~TX_ENABLE, msp->registers + MSP_GCR);
reg_val_GCR       535 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_GCR;
reg_val_GCR       539 sound/soc/ux500/ux500_msp_i2s.c 	reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       543 sound/soc/ux500/ux500_msp_i2s.c 		reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       544 sound/soc/ux500/ux500_msp_i2s.c 		writel(reg_val_GCR | LOOPBACK_MASK,
reg_val_GCR       574 sound/soc/ux500/ux500_msp_i2s.c 	u32 reg_val_GCR, enable_bit;
reg_val_GCR       590 sound/soc/ux500/ux500_msp_i2s.c 		reg_val_GCR = readl(msp->registers + MSP_GCR);
reg_val_GCR       591 sound/soc/ux500/ux500_msp_i2s.c 		writel(reg_val_GCR | enable_bit, msp->registers + MSP_GCR);