reg_v              59 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c 	u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000;
reg_v              60 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c 	switch (reg_v) {
reg_v              74 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c 	u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300;
reg_v              75 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c 	if (reg_v == 0x2200)
reg_v              80 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c 	u8 reg_v = 0;
reg_v              83 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c 		reg_v = 1;
reg_v              86 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c 		reg_v = 2;
reg_v              89 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c 		reg_v = 3;
reg_v              92 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c 	nvkm_pci_mask(pci, 0xa8, 0x3, reg_v);
reg_v              98 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c 	u8 reg_v = nvkm_pci_rd32(pci, 0xa8) & 0x3;
reg_v              99 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c 	switch (reg_v) {