reg_uV           1526 drivers/clk/tegra/clk-dfll.c 	int i, n_voltages, reg_uV,reg_volt_id, align_step;
reg_uV           1534 drivers/clk/tegra/clk-dfll.c 		reg_uV = regulator_list_voltage(td->vdd_reg, i);
reg_uV           1535 drivers/clk/tegra/clk-dfll.c 		if (reg_uV < 0)
reg_uV           1538 drivers/clk/tegra/clk-dfll.c 		reg_volt_id = reg_uV / td->soc->alignment.step_uv;
reg_uV           1554 drivers/clk/tegra/clk-dfll.c 	int i, n_voltages, reg_uV, reg_volt_id, align_step;
reg_uV           1562 drivers/clk/tegra/clk-dfll.c 		reg_uV = regulator_list_voltage(td->vdd_reg, i);
reg_uV           1563 drivers/clk/tegra/clk-dfll.c 		if (reg_uV < 0)
reg_uV           1566 drivers/clk/tegra/clk-dfll.c 		reg_volt_id = reg_uV / td->soc->alignment.step_uv;