reg_tbl           416 drivers/media/platform/qcom/venus/core.c 	.reg_tbl = msm8916_reg_preset,
reg_tbl           446 drivers/media/platform/qcom/venus/core.c 	.reg_tbl = msm8996_reg_preset,
reg_tbl            33 drivers/media/platform/qcom/venus/core.h 	const struct reg_val *reg_tbl;
reg_tbl           361 drivers/media/platform/qcom/venus/hfi_venus.c 	const struct reg_val *tbl = res->reg_tbl;
reg_tbl          5578 drivers/net/ethernet/broadcom/bnx2.c 	} reg_tbl[] = {
reg_tbl          5692 drivers/net/ethernet/broadcom/bnx2.c 	for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
reg_tbl          5694 drivers/net/ethernet/broadcom/bnx2.c 		u16 flags = reg_tbl[i].flags;
reg_tbl          5699 drivers/net/ethernet/broadcom/bnx2.c 		offset = (u32) reg_tbl[i].offset;
reg_tbl          5700 drivers/net/ethernet/broadcom/bnx2.c 		rw_mask = reg_tbl[i].rw_mask;
reg_tbl          5701 drivers/net/ethernet/broadcom/bnx2.c 		ro_mask = reg_tbl[i].ro_mask;
reg_tbl          2240 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c 	} reg_tbl[] = {
reg_tbl          2352 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c 		for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) {
reg_tbl          2354 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c 			if (!(hw & reg_tbl[i].hw))
reg_tbl          2357 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c 			offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1;
reg_tbl          2358 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c 			mask = reg_tbl[i].mask;
reg_tbl          13107 drivers/net/ethernet/broadcom/tg3.c 	} reg_tbl[] = {
reg_tbl          13250 drivers/net/ethernet/broadcom/tg3.c 	for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
reg_tbl          13251 drivers/net/ethernet/broadcom/tg3.c 		if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705))
reg_tbl          13254 drivers/net/ethernet/broadcom/tg3.c 		if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705))
reg_tbl          13258 drivers/net/ethernet/broadcom/tg3.c 		    (reg_tbl[i].flags & TG3_FL_NOT_5788))
reg_tbl          13261 drivers/net/ethernet/broadcom/tg3.c 		if (is_5750 && (reg_tbl[i].flags & TG3_FL_NOT_5750))
reg_tbl          13264 drivers/net/ethernet/broadcom/tg3.c 		offset = (u32) reg_tbl[i].offset;
reg_tbl          13265 drivers/net/ethernet/broadcom/tg3.c 		read_mask = reg_tbl[i].read_mask;
reg_tbl          13266 drivers/net/ethernet/broadcom/tg3.c 		write_mask = reg_tbl[i].write_mask;
reg_tbl           531 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 	u32 *reg_tbl;
reg_tbl           265 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 	ahw->reg_tbl		= (u32 *)qlcnic_83xx_reg_tbl;
reg_tbl          3609 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 		sizeof(*adapter->ahw->reg_tbl));
reg_tbl            40 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h 	readl(((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
reg_tbl            44 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h 	writel(value, ((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
reg_tbl          2499 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c 		ahw->reg_tbl = (u32 *) qlcnic_reg_tbl;
reg_tbl           662 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c 	ahw->reg_tbl		= (u32 *)qlcnic_83xx_reg_tbl;
reg_tbl           454 drivers/scsi/qla4xxx/ql4_83xx.c 				     ha->reg_tbl[QLA8XXX_CRB_DEV_PART_INFO]);
reg_tbl           456 drivers/scsi/qla4xxx/ql4_83xx.c 	drv_active = qla4_83xx_rd_reg(ha, ha->reg_tbl[QLA8XXX_CRB_DRV_ACTIVE]);
reg_tbl           809 drivers/scsi/qla4xxx/ql4_def.h 	uint32_t *reg_tbl;
reg_tbl          1049 drivers/scsi/qla4xxx/ql4_def.h 	return ha->isp_ops->rd_reg_direct(ha, ha->reg_tbl[crb_reg]);
reg_tbl          1056 drivers/scsi/qla4xxx/ql4_def.h 	ha->isp_ops->wr_reg_direct(ha, ha->reg_tbl[crb_reg], value);
reg_tbl          8636 drivers/scsi/qla4xxx/ql4_os.c 		ha->reg_tbl = (uint32_t *) qla4_82xx_reg_tbl;
reg_tbl          8648 drivers/scsi/qla4xxx/ql4_os.c 		ha->reg_tbl = (uint32_t *)qla4_83xx_reg_tbl;