reg_state__        43 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	u32 *reg_state__ = (reg_state); \
reg_state__        45 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	(reg_state__)[(pos__) + 0] = i915_mmio_reg_offset(reg); \
reg_state__        46 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	(reg_state__)[(pos__) + 1] = (val); \
reg_state__        50 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	u32 *reg_state__ = (reg_state); \
reg_state__        52 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	(reg_state__)[CTX_PDP ## n ## _UDW + 1] = upper_32_bits(addr__); \
reg_state__        53 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	(reg_state__)[CTX_PDP ## n ## _LDW + 1] = lower_32_bits(addr__); \
reg_state__        57 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	u32 *reg_state__ = (reg_state); \
reg_state__        59 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	(reg_state__)[CTX_PDP0_UDW + 1] = upper_32_bits(addr__); \
reg_state__        60 drivers/gpu/drm/i915/gt/intel_lrc_reg.h 	(reg_state__)[CTX_PDP0_LDW + 1] = lower_32_bits(addr__); \