reg_paddr 507 drivers/gpu/drm/vc4/vc4_dsi.c dma_addr_t reg_paddr; reg_paddr 564 drivers/gpu/drm/vc4/vc4_dsi.c dsi->reg_paddr + offset, reg_paddr 1513 drivers/gpu/drm/vc4/vc4_dsi.c dsi->reg_paddr = be32_to_cpup(of_get_address(dev->of_node, reg_paddr 163 drivers/spi/spi-sprd-adi.c static int sprd_adi_read(struct sprd_adi *sadi, u32 reg_paddr, u32 *read_val) reg_paddr 184 drivers/spi/spi-sprd-adi.c writel_relaxed(reg_paddr, sadi->base + REG_ADI_RD_CMD); reg_paddr 214 drivers/spi/spi-sprd-adi.c if (rd_addr != (reg_paddr & REG_ADDR_LOW_MASK)) { reg_paddr 216 drivers/spi/spi-sprd-adi.c reg_paddr, val); reg_paddr 229 drivers/spi/spi-sprd-adi.c static int sprd_adi_write(struct sprd_adi *sadi, u32 reg_paddr, u32 val) reg_paddr 231 drivers/spi/spi-sprd-adi.c unsigned long reg = sprd_adi_to_vaddr(sadi, reg_paddr);