reg_offs         2970 arch/arm/mach-omap2/omap_hwmod.c u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
reg_offs         2973 arch/arm/mach-omap2/omap_hwmod.c 		return readw_relaxed(oh->_mpu_rt_va + reg_offs);
reg_offs         2975 arch/arm/mach-omap2/omap_hwmod.c 		return readl_relaxed(oh->_mpu_rt_va + reg_offs);
reg_offs         2978 arch/arm/mach-omap2/omap_hwmod.c void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
reg_offs         2981 arch/arm/mach-omap2/omap_hwmod.c 		writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
reg_offs         2983 arch/arm/mach-omap2/omap_hwmod.c 		writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
reg_offs          637 arch/arm/mach-omap2/omap_hwmod.h void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
reg_offs          638 arch/arm/mach-omap2/omap_hwmod.h u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
reg_offs           47 arch/microblaze/kernel/ptrace.c static microblaze_reg_t *reg_save_addr(unsigned reg_offs,
reg_offs           75 arch/microblaze/kernel/ptrace.c 	return (microblaze_reg_t *)((char *)regs + reg_offs);
reg_offs           89 drivers/irqchip/irq-imgpdc.c static void pdc_write(struct pdc_intc_priv *priv, unsigned int reg_offs,
reg_offs           92 drivers/irqchip/irq-imgpdc.c 	iowrite32(data, priv->pdc_base + reg_offs);
reg_offs           96 drivers/irqchip/irq-imgpdc.c 			     unsigned int reg_offs)
reg_offs           98 drivers/irqchip/irq-imgpdc.c 	return ioread32(priv->pdc_base + reg_offs);
reg_offs          160 drivers/irqchip/irq-sunxi-nmi.c 					const struct sunxi_sc_nmi_reg_offs *reg_offs)
reg_offs          204 drivers/irqchip/irq-sunxi-nmi.c 	gc->chip_types[0].regs.ack		= reg_offs->pend;
reg_offs          205 drivers/irqchip/irq-sunxi-nmi.c 	gc->chip_types[0].regs.mask		= reg_offs->enable;
reg_offs          206 drivers/irqchip/irq-sunxi-nmi.c 	gc->chip_types[0].regs.type		= reg_offs->ctrl;
reg_offs          214 drivers/irqchip/irq-sunxi-nmi.c 	gc->chip_types[1].regs.ack		= reg_offs->pend;
reg_offs          215 drivers/irqchip/irq-sunxi-nmi.c 	gc->chip_types[1].regs.mask		= reg_offs->enable;
reg_offs          216 drivers/irqchip/irq-sunxi-nmi.c 	gc->chip_types[1].regs.type		= reg_offs->ctrl;
reg_offs          220 drivers/irqchip/irq-sunxi-nmi.c 	sunxi_sc_nmi_write(gc, reg_offs->enable, 0);
reg_offs          223 drivers/irqchip/irq-sunxi-nmi.c 	sunxi_sc_nmi_write(gc, reg_offs->pend, SUNXI_NMI_IRQ_BIT);
reg_offs           40 drivers/media/dvb-frontends/dib7000m.c 	u8 reg_offs;
reg_offs          140 drivers/media/dvb-frontends/dib7000m.c 		if (state->reg_offs && (r >= 112 && r <= 331)) // compensate for 7000MC
reg_offs          159 drivers/media/dvb-frontends/dib7000m.c 	smo_mode = (dib7000m_read_word(state, 294 + state->reg_offs) & 0x0010) | (1 << 1);
reg_offs          195 drivers/media/dvb-frontends/dib7000m.c 	ret |= dib7000m_write_word(state,  294 + state->reg_offs, smo_mode);
reg_offs          196 drivers/media/dvb-frontends/dib7000m.c 	ret |= dib7000m_write_word(state,  295 + state->reg_offs, fifo_threshold); /* synchronous fread */
reg_offs          353 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 263 + state->reg_offs, 6);
reg_offs          354 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 264 + state->reg_offs, 6);
reg_offs          355 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 266 + state->reg_offs, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0));
reg_offs          357 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 263 + state->reg_offs, 1);
reg_offs          358 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 264 + state->reg_offs, 0);
reg_offs          359 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 266 + state->reg_offs, 0);
reg_offs          605 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 261 + state->reg_offs, 2);
reg_offs          607 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 224 + state->reg_offs, 1);
reg_offs          896 drivers/media/dvb-frontends/dib7000m.c 	dib7000m_write_word(state, 267 + state->reg_offs, value);
reg_offs          958 drivers/media/dvb-frontends/dib7000m.c 		dib7000m_write_word(state, 214 + value + state->reg_offs, est[value]);
reg_offs         1149 drivers/media/dvb-frontends/dib7000m.c 	case 0x4001: state->reg_offs = 1; dprintk("found DiB7000HC\n"); break;
reg_offs         1150 drivers/media/dvb-frontends/dib7000m.c 	case 0x4002: state->reg_offs = 1; dprintk("found DiB7000MC\n"); break;
reg_offs         1151 drivers/media/dvb-frontends/dib7000m.c 	case 0x4003: state->reg_offs = 1; dprintk("found DiB9000\n"); break;
reg_offs         1335 drivers/media/dvb-frontends/dib7000m.c 	u16 val = dib7000m_read_word(state, 294 + state->reg_offs) & 0xffef;
reg_offs         1338 drivers/media/dvb-frontends/dib7000m.c 	return dib7000m_write_word(state, 294 + state->reg_offs, val);
reg_offs         1346 drivers/media/dvb-frontends/dib7000m.c 	return dib7000m_write_word(state, 300 + state->reg_offs + id,
reg_offs           56 drivers/media/dvb-frontends/dib9000.c 	u8 reg_offs;
reg_offs          976 drivers/media/dvb-frontends/dib9000.c 		state->reg_offs = 1;
reg_offs          301 drivers/media/platform/renesas-ceu.c static void ceu_write(struct ceu_device *priv, unsigned int reg_offs, u32 data)
reg_offs          303 drivers/media/platform/renesas-ceu.c 	iowrite32(data, priv->base + reg_offs);
reg_offs          306 drivers/media/platform/renesas-ceu.c static u32 ceu_read(struct ceu_device *priv, unsigned int reg_offs)
reg_offs          308 drivers/media/platform/renesas-ceu.c 	return ioread32(priv->base + reg_offs);
reg_offs          158 drivers/media/rc/img-ir/img-ir.h 				unsigned int reg_offs, unsigned int data)
reg_offs          160 drivers/media/rc/img-ir/img-ir.h 	iowrite32(data, priv->reg_base + reg_offs);
reg_offs          164 drivers/media/rc/img-ir/img-ir.h 				       unsigned int reg_offs)
reg_offs          166 drivers/media/rc/img-ir/img-ir.h 	return ioread32(priv->reg_base + reg_offs);
reg_offs         1050 drivers/misc/genwqe/card_dev.c 	u32 reg_offs;
reg_offs         1069 drivers/misc/genwqe/card_dev.c 		if (get_user(reg_offs, &io->num))
reg_offs         1072 drivers/misc/genwqe/card_dev.c 		if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
reg_offs         1075 drivers/misc/genwqe/card_dev.c 		val = __genwqe_readq(cd, reg_offs);
reg_offs         1089 drivers/misc/genwqe/card_dev.c 		if (get_user(reg_offs, &io->num))
reg_offs         1092 drivers/misc/genwqe/card_dev.c 		if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
reg_offs         1098 drivers/misc/genwqe/card_dev.c 		__genwqe_writeq(cd, reg_offs, val);
reg_offs         1105 drivers/misc/genwqe/card_dev.c 		if (get_user(reg_offs, &io->num))
reg_offs         1108 drivers/misc/genwqe/card_dev.c 		if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
reg_offs         1111 drivers/misc/genwqe/card_dev.c 		val = __genwqe_readl(cd, reg_offs);
reg_offs         1125 drivers/misc/genwqe/card_dev.c 		if (get_user(reg_offs, &io->num))
reg_offs         1128 drivers/misc/genwqe/card_dev.c 		if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
reg_offs         1134 drivers/misc/genwqe/card_dev.c 		__genwqe_writel(cd, reg_offs, val);
reg_offs         1202 drivers/mtd/nand/raw/brcmnand/brcmnand.c 	u16 offset0, offset10, reg_offs;
reg_offs         1211 drivers/mtd/nand/raw/brcmnand/brcmnand.c 		reg_offs = offset10 + ((offs - 0x10) & ~0x03);
reg_offs         1213 drivers/mtd/nand/raw/brcmnand/brcmnand.c 		reg_offs = offset0 + (offs & ~0x03);
reg_offs         1215 drivers/mtd/nand/raw/brcmnand/brcmnand.c 	return nand_readreg(ctrl, reg_offs) >> (24 - ((offs & 0x03) << 3));
reg_offs         1221 drivers/mtd/nand/raw/brcmnand/brcmnand.c 	u16 offset0, offset10, reg_offs;
reg_offs         1230 drivers/mtd/nand/raw/brcmnand/brcmnand.c 		reg_offs = offset10 + ((offs - 0x10) & ~0x03);
reg_offs         1232 drivers/mtd/nand/raw/brcmnand/brcmnand.c 		reg_offs = offset0 + (offs & ~0x03);
reg_offs         1234 drivers/mtd/nand/raw/brcmnand/brcmnand.c 	nand_writereg(ctrl, reg_offs, data);
reg_offs           48 drivers/soc/imx/gpc.c 	unsigned int reg_offs;
reg_offs           66 drivers/soc/imx/gpc.c 	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val);
reg_offs           71 drivers/soc/imx/gpc.c 	regmap_update_bits(pd->regmap, pd->reg_offs + GPC_PGC_CTRL_OFFS,
reg_offs          107 drivers/soc/imx/gpc.c 	regmap_update_bits(pd->regmap, pd->reg_offs + GPC_PGC_CTRL_OFFS,
reg_offs          267 drivers/soc/imx/gpc.c 		.reg_offs = 0x260,
reg_offs          276 drivers/soc/imx/gpc.c 		.reg_offs = 0x240,
reg_offs          285 drivers/soc/imx/gpc.c 		.reg_offs = 0x200,
reg_offs           69 drivers/soc/renesas/rcar-sysc.c 	unsigned int sr_bit, reg_offs;
reg_offs           74 drivers/soc/renesas/rcar-sysc.c 		reg_offs = PWRONCR_OFFS;
reg_offs           77 drivers/soc/renesas/rcar-sysc.c 		reg_offs = PWROFFCR_OFFS;
reg_offs           92 drivers/soc/renesas/rcar-sysc.c 		  rcar_sysc_base + sysc_ch->chan_offs + reg_offs);
reg_offs          195 drivers/spi/spi-sh-msiof.c static u32 sh_msiof_read(struct sh_msiof_spi_priv *p, int reg_offs)
reg_offs          197 drivers/spi/spi-sh-msiof.c 	switch (reg_offs) {
reg_offs          200 drivers/spi/spi-sh-msiof.c 		return ioread16(p->mapbase + reg_offs);
reg_offs          202 drivers/spi/spi-sh-msiof.c 		return ioread32(p->mapbase + reg_offs);
reg_offs          206 drivers/spi/spi-sh-msiof.c static void sh_msiof_write(struct sh_msiof_spi_priv *p, int reg_offs,
reg_offs          209 drivers/spi/spi-sh-msiof.c 	switch (reg_offs) {
reg_offs          212 drivers/spi/spi-sh-msiof.c 		iowrite16(value, p->mapbase + reg_offs);
reg_offs          215 drivers/spi/spi-sh-msiof.c 		iowrite32(value, p->mapbase + reg_offs);
reg_offs           73 drivers/thermal/broadcom/brcmstb_thermal.c 	u32 reg_offs;
reg_offs           83 drivers/thermal/broadcom/brcmstb_thermal.c 		.reg_offs	= AVS_TMON_INT_THRESH,
reg_offs           91 drivers/thermal/broadcom/brcmstb_thermal.c 		.reg_offs	= AVS_TMON_INT_THRESH,
reg_offs           99 drivers/thermal/broadcom/brcmstb_thermal.c 		.reg_offs	= AVS_TMON_RESET_THRESH,
reg_offs          186 drivers/thermal/broadcom/brcmstb_thermal.c 	u32 val = __raw_readl(priv->tmon_base + trip->reg_offs);
reg_offs          210 drivers/thermal/broadcom/brcmstb_thermal.c 	orig = __raw_readl(priv->tmon_base + trip->reg_offs);
reg_offs          213 drivers/thermal/broadcom/brcmstb_thermal.c 	__raw_writel(orig, priv->tmon_base + trip->reg_offs);
reg_offs          291 drivers/video/fbdev/sh_mobile_lcdcfb.c 	iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
reg_offs          293 drivers/video/fbdev/sh_mobile_lcdcfb.c 		iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
reg_offs          300 drivers/video/fbdev/sh_mobile_lcdcfb.c 	iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
reg_offs          307 drivers/video/fbdev/sh_mobile_lcdcfb.c 	return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
reg_offs          318 drivers/video/fbdev/sh_mobile_lcdcfb.c 		       unsigned long reg_offs, unsigned long data)
reg_offs          320 drivers/video/fbdev/sh_mobile_lcdcfb.c 	iowrite32(data, priv->base + reg_offs);
reg_offs          324 drivers/video/fbdev/sh_mobile_lcdcfb.c 			       unsigned long reg_offs)
reg_offs          326 drivers/video/fbdev/sh_mobile_lcdcfb.c 	return ioread32(priv->base + reg_offs);
reg_offs          330 drivers/video/fbdev/sh_mobile_lcdcfb.c 			  unsigned long reg_offs,
reg_offs          333 drivers/video/fbdev/sh_mobile_lcdcfb.c 	while ((lcdc_read(priv, reg_offs) & mask) != until)
reg_offs         2570 drivers/video/fbdev/sh_mobile_lcdcfb.c 			ch->reg_offs = lcdc_offs_mainlcd;
reg_offs         2575 drivers/video/fbdev/sh_mobile_lcdcfb.c 			ch->reg_offs = lcdc_offs_sublcd;
reg_offs           61 drivers/video/fbdev/sh_mobile_lcdcfb.h 	unsigned long *reg_offs;