reg_off_dma       233 drivers/mmc/host/cavium-octeon.c 	host->reg_off_dma = -0x20;
reg_off_dma        86 drivers/mmc/host/cavium-thunderx.c 	host->reg_off_dma = 0x160;
reg_off_dma        26 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CFG(x)	(0x00 + x->reg_off_dma)
reg_off_dma        27 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_ADR(x)	(0x10 + x->reg_off_dma)
reg_off_dma        28 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD(x)	(0x18 + x->reg_off_dma)
reg_off_dma        29 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG(x)	(0x20 + x->reg_off_dma)
reg_off_dma        30 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_ADR(x)	(0x28 + x->reg_off_dma)
reg_off_dma        31 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT(x)	(0x30 + x->reg_off_dma)
reg_off_dma        32 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT_W1S(x)	(0x38 + x->reg_off_dma)
reg_off_dma        33 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT_ENA_W1S(x) (0x40 + x->reg_off_dma)
reg_off_dma        34 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT_ENA_W1C(x) (0x48 + x->reg_off_dma)
reg_off_dma        60 drivers/mmc/host/cavium.h 	int reg_off_dma;