reg_divider_shift 432 drivers/clk/clk-xgene.c u32 reg_divider_shift; /* Bit shift to divider field */ reg_divider_shift 542 drivers/clk/clk-xgene.c data >>= pclk->param.reg_divider_shift; reg_divider_shift 575 drivers/clk/clk-xgene.c divider <<= pclk->param.reg_divider_shift; reg_divider_shift 581 drivers/clk/clk-xgene.c << pclk->param.reg_divider_shift); reg_divider_shift 718 drivers/clk/clk-xgene.c ¶meters.reg_divider_shift)) reg_divider_shift 719 drivers/clk/clk-xgene.c parameters.reg_divider_shift = 0;