reg_csr_mask      429 drivers/clk/clk-xgene.c 	u32 reg_csr_mask;		/* Mask bit for disable CSR reset */
reg_csr_mask      469 drivers/clk/clk-xgene.c 		data &= ~pclk->param.reg_csr_mask;
reg_csr_mask      474 drivers/clk/clk-xgene.c 			pclk->param.reg_csr_offset, pclk->param.reg_csr_mask,
reg_csr_mask      498 drivers/clk/clk-xgene.c 		data |= pclk->param.reg_csr_mask;
reg_csr_mask      704 drivers/clk/clk-xgene.c 	if (of_property_read_u32(np, "csr-mask", &parameters.reg_csr_mask))
reg_csr_mask      705 drivers/clk/clk-xgene.c 		parameters.reg_csr_mask = 0xF;