reg_ch_base        63 drivers/dma/uniphier-mdmac.c 	void __iomem *reg_ch_base;
reg_ch_base       130 drivers/dma/uniphier-mdmac.c 	writel(src_mode, mc->reg_ch_base + UNIPHIER_MDMAC_CH_SRC_MODE);
reg_ch_base       131 drivers/dma/uniphier-mdmac.c 	writel(dest_mode, mc->reg_ch_base + UNIPHIER_MDMAC_CH_DEST_MODE);
reg_ch_base       132 drivers/dma/uniphier-mdmac.c 	writel(src_addr, mc->reg_ch_base + UNIPHIER_MDMAC_CH_SRC_ADDR);
reg_ch_base       133 drivers/dma/uniphier-mdmac.c 	writel(dest_addr, mc->reg_ch_base + UNIPHIER_MDMAC_CH_DEST_ADDR);
reg_ch_base       134 drivers/dma/uniphier-mdmac.c 	writel(chunk_size, mc->reg_ch_base + UNIPHIER_MDMAC_CH_SIZE);
reg_ch_base       137 drivers/dma/uniphier-mdmac.c 	writel(irq_flag, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_REQ);
reg_ch_base       139 drivers/dma/uniphier-mdmac.c 	writel(irq_flag, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_EN);
reg_ch_base       162 drivers/dma/uniphier-mdmac.c 	writel(irq_flag, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_REQ);
reg_ch_base       171 drivers/dma/uniphier-mdmac.c 	return readl_poll_timeout(mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_REQ,
reg_ch_base       184 drivers/dma/uniphier-mdmac.c 	irq_stat = readl(mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_DET);
reg_ch_base       196 drivers/dma/uniphier-mdmac.c 	writel(irq_stat, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_REQ);
reg_ch_base       306 drivers/dma/uniphier-mdmac.c 		txstate->residue = readl(mc->reg_ch_base +
reg_ch_base       371 drivers/dma/uniphier-mdmac.c 	mc->reg_ch_base = mdev->reg_base + UNIPHIER_MDMAC_CH_OFFSET +