reg_bar           102 drivers/infiniband/hw/efa/efa_com.c 	writel(mmio_read_reg, edev->reg_bar + EFA_REGS_MMIO_REG_READ_OFF);
reg_bar           155 drivers/infiniband/hw/efa/efa_com.c 	sq->db_addr = (u32 __iomem *)(edev->reg_bar + EFA_REGS_AQ_PROD_DB_OFF);
reg_bar           160 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_AQ_BASE_LO_OFF);
reg_bar           161 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_AQ_BASE_HI_OFF);
reg_bar           168 drivers/infiniband/hw/efa/efa_com.c 	writel(aq_caps, edev->reg_bar + EFA_REGS_AQ_CAPS_OFF);
reg_bar           195 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_ACQ_BASE_LO_OFF);
reg_bar           196 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_ACQ_BASE_HI_OFF);
reg_bar           206 drivers/infiniband/hw/efa/efa_com.c 	writel(acq_caps, edev->reg_bar + EFA_REGS_ACQ_CAPS_OFF);
reg_bar           237 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_AENQ_BASE_LO_OFF);
reg_bar           238 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_AENQ_BASE_HI_OFF);
reg_bar           247 drivers/infiniband/hw/efa/efa_com.c 	writel(aenq_caps, edev->reg_bar + EFA_REGS_AENQ_CAPS_OFF);
reg_bar           253 drivers/infiniband/hw/efa/efa_com.c 	writel(edev->aenq.cc, edev->reg_bar + EFA_REGS_AENQ_CONS_DB_OFF);
reg_bar           710 drivers/infiniband/hw/efa/efa_com.c 	writel(mask_value, edev->reg_bar + EFA_REGS_INTR_MASK_OFF);
reg_bar           896 drivers/infiniband/hw/efa/efa_com.c 	writel(aenq->cc, edev->reg_bar + EFA_REGS_AENQ_CONS_DB_OFF);
reg_bar           909 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_MMIO_RESP_HI_OFF);
reg_bar           910 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_MMIO_RESP_LO_OFF);
reg_bar          1072 drivers/infiniband/hw/efa/efa_com.c 	writel(reset_val, edev->reg_bar + EFA_REGS_DEV_CTL_OFF);
reg_bar          1085 drivers/infiniband/hw/efa/efa_com.c 	writel(0, edev->reg_bar + EFA_REGS_DEV_CTL_OFF);
reg_bar           105 drivers/infiniband/hw/efa/efa_com.h 	u8 __iomem *reg_bar;
reg_bar           429 drivers/infiniband/hw/efa/efa_main.c 	edev->reg_bar = devm_ioremap(&pdev->dev,
reg_bar           432 drivers/infiniband/hw/efa/efa_main.c 	if (!edev->reg_bar) {
reg_bar           476 drivers/infiniband/hw/efa/efa_main.c 	devm_iounmap(&pdev->dev, edev->reg_bar);
reg_bar           496 drivers/infiniband/hw/efa/efa_main.c 	devm_iounmap(&pdev->dev, edev->reg_bar);
reg_bar           173 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, dev->reg_bar + ENA_REGS_AENQ_BASE_LO_OFF);
reg_bar           174 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, dev->reg_bar + ENA_REGS_AENQ_BASE_HI_OFF);
reg_bar           181 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(aenq_caps, dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF);
reg_bar           818 drivers/net/ethernet/amazon/ena/ena_com.c 		return readl(ena_dev->reg_bar + offset);
reg_bar           829 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(mmio_read_reg, ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF);
reg_bar          1254 drivers/net/ethernet/amazon/ena/ena_com.c 	io_sq->db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar +
reg_bar          1399 drivers/net/ethernet/amazon/ena/ena_com.c 	io_cq->unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar +
reg_bar          1404 drivers/net/ethernet/amazon/ena/ena_com.c 			(u32 __iomem *)((uintptr_t)ena_dev->reg_bar +
reg_bar          1409 drivers/net/ethernet/amazon/ena/ena_com.c 			(u32 __iomem *)((uintptr_t)ena_dev->reg_bar +
reg_bar          1516 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(depth, ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);
reg_bar          1668 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(mask_value, ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF);
reg_bar          1714 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF);
reg_bar          1715 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF);
reg_bar          1731 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF);
reg_bar          1732 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF);
reg_bar          1776 drivers/net/ethernet/amazon/ena/ena_com.c 	admin_queue->sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar +
reg_bar          1782 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, ena_dev->reg_bar + ENA_REGS_AQ_BASE_LO_OFF);
reg_bar          1783 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, ena_dev->reg_bar + ENA_REGS_AQ_BASE_HI_OFF);
reg_bar          1788 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_LO_OFF);
reg_bar          1789 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_HI_OFF);
reg_bar          1803 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(aq_caps, ena_dev->reg_bar + ENA_REGS_AQ_CAPS_OFF);
reg_bar          1804 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(acq_caps, ena_dev->reg_bar + ENA_REGS_ACQ_CAPS_OFF);
reg_bar          2067 drivers/net/ethernet/amazon/ena/ena_com.c 		       dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);
reg_bar          2101 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF);
reg_bar          2114 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(0, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF);
reg_bar           324 drivers/net/ethernet/amazon/ena/ena_com.h 	u8 __iomem *reg_bar;
reg_bar          3471 drivers/net/ethernet/amazon/ena/ena_netdev.c 	ena_dev->reg_bar = devm_ioremap(&pdev->dev,
reg_bar          3474 drivers/net/ethernet/amazon/ena/ena_netdev.c 	if (!ena_dev->reg_bar) {
reg_bar          1075 drivers/net/ethernet/google/gve/gve_main.c 	struct gve_registers __iomem *reg_bar;
reg_bar          1102 drivers/net/ethernet/google/gve/gve_main.c 	reg_bar = pci_iomap(pdev, GVE_REGISTER_BAR, 0);
reg_bar          1103 drivers/net/ethernet/google/gve/gve_main.c 	if (!reg_bar) {
reg_bar          1116 drivers/net/ethernet/google/gve/gve_main.c 	gve_write_version(&reg_bar->driver_version);
reg_bar          1118 drivers/net/ethernet/google/gve/gve_main.c 	max_rx_queues = ioread32be(&reg_bar->max_tx_queues);
reg_bar          1119 drivers/net/ethernet/google/gve/gve_main.c 	max_tx_queues = ioread32be(&reg_bar->max_rx_queues);
reg_bar          1148 drivers/net/ethernet/google/gve/gve_main.c 	priv->reg_bar0 = reg_bar;
reg_bar          1187 drivers/net/ethernet/google/gve/gve_main.c 	pci_iounmap(pdev, reg_bar);
reg_bar          1202 drivers/net/ethernet/google/gve/gve_main.c 	void __iomem *reg_bar = priv->reg_bar0;
reg_bar          1209 drivers/net/ethernet/google/gve/gve_main.c 	pci_iounmap(pdev, reg_bar);