reg_910           395 drivers/media/dvb-frontends/dib7000m.c 	u16 reg_907,reg_910;
reg_910           401 drivers/media/dvb-frontends/dib7000m.c 	reg_910 = (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset;
reg_910           406 drivers/media/dvb-frontends/dib7000m.c 		reg_910 |= (1 << 5);  // forcing the predivider to 1
reg_910           415 drivers/media/dvb-frontends/dib7000m.c 		reg_910 |= (bw->pll_prediv << 5);
reg_910           418 drivers/media/dvb-frontends/dib7000m.c 	dib7000m_write_word(state, 910, reg_910); // pll cfg