reg_              231 arch/arm64/kernel/cpuinfo.c 			return sprintf(buf, "0x%016x\n", info->reg_##_field);	\
reg_             2472 drivers/gpu/drm/i915/i915_drv.h #define intel_de_wait_for_register(dev_priv_, reg_, mask_, value_, timeout_) \
reg_             2474 drivers/gpu/drm/i915/i915_drv.h 				(reg_), (mask_), (value_), (timeout_))
reg_             2476 drivers/gpu/drm/i915/i915_drv.h #define intel_de_wait_for_set(dev_priv_, reg_, mask_, timeout_) ({	\
reg_             2478 drivers/gpu/drm/i915/i915_drv.h 	intel_de_wait_for_register((dev_priv_), (reg_),			\
reg_             2482 drivers/gpu/drm/i915/i915_drv.h #define intel_de_wait_for_clear(dev_priv_, reg_, mask_, timeout_) \
reg_             2483 drivers/gpu/drm/i915/i915_drv.h 	intel_de_wait_for_register((dev_priv_), (reg_), (mask_), 0, (timeout_))
reg_               57 drivers/iio/light/stk3310.c 		data->reg_##name =					    \
reg_               60 drivers/iio/light/stk3310.c 		if (IS_ERR(data->reg_##name)) {				    \
reg_               62 drivers/iio/light/stk3310.c 			return PTR_ERR(data->reg_##name);		    \
reg_              639 drivers/net/ethernet/mellanox/mlx4/en_ethtool.c #define MLX4_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)		\
reg_              644 drivers/net/ethernet/mellanox/mlx4/en_ethtool.c 		cfg = &ptys2ethtool_map[reg_];				\
reg_               72 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...)                  \
reg_               77 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c 		cfg = &ptys2##table##_ethtool_table[reg_];		\