reg0 72 arch/ia64/include/asm/native/inst.h #define THASH(pred, reg0, reg1, clob) \ reg0 73 arch/ia64/include/asm/native/inst.h (pred) thash reg0 = reg1 reg0 199 arch/mips/include/asm/octeon/cvmx-pko.h uint64_t reg0:11; reg0 256 arch/mips/include/asm/octeon/cvmx-pko.h uint64_t reg0:11; reg0 56 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = AP_MKQID(0, 0); reg0 66 arch/s390/include/asm/ap.h : "d" (reg0) reg0 80 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = qid; reg0 86 arch/s390/include/asm/ap.h : "d" (reg0) reg0 118 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = qid | (1UL << 24); reg0 124 arch/s390/include/asm/ap.h : "d" (reg0) reg0 137 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = qid | (2UL << 24); reg0 143 arch/s390/include/asm/ap.h : "d" (reg0) reg0 175 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = 4UL << 24; reg0 185 arch/s390/include/asm/ap.h : "d" (reg0), "d" (reg2) reg0 223 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = qid | (3UL << 24); reg0 236 arch/s390/include/asm/ap.h : "d" (reg0), "d" (reg2) reg0 271 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = qid | (5UL << 24) reg0 284 arch/s390/include/asm/ap.h : "d" (reg0) reg0 306 arch/s390/include/asm/ap.h register unsigned long reg0 asm ("0") = qid | 0x40000000UL; reg0 316 arch/s390/include/asm/ap.h : "+d" (reg0), "=d" (reg1), "+d" (reg2), "+d" (reg3) reg0 344 arch/s390/include/asm/ap.h register unsigned long reg0 asm("0") = qid | 0x80000000UL; reg0 356 arch/s390/include/asm/ap.h : "+d" (reg0), "=d" (reg1), "+d" (reg2), reg0 64 arch/s390/include/asm/facility.h register unsigned long reg0 asm("0") = size - 1; reg0 68 arch/s390/include/asm/facility.h : "+d" (reg0) reg0 71 arch/s390/include/asm/facility.h return reg0; reg0 115 arch/s390/include/asm/timex.h register unsigned int reg0 asm("0") = func; \ reg0 124 arch/s390/include/asm/timex.h : "d" (reg0), "d" (reg1) : "cc"); \ reg0 614 arch/s390/kvm/priv.c unsigned long reg0; reg0 632 arch/s390/kvm/priv.c reg0 = vcpu->run->s.regs.gprs[0]; reg0 633 arch/s390/kvm/priv.c fc = (reg0 >> 24) & 0xff; reg0 643 arch/s390/kvm/priv.c if (reg0 & 0x007f0000UL) reg0 646 arch/s390/kvm/priv.c if (!test_kvm_facility(vcpu->kvm, 15) && (reg0 & 0x00800000UL)) reg0 649 arch/s390/kvm/priv.c if (!(vcpu->kvm->arch.crypto.crycbd & 0x02) && (reg0 & 0x0000c0f0UL)) reg0 107 arch/s390/lib/uaccess.c register unsigned long reg0 asm("0") = 0x01UL; reg0 130 arch/s390/lib/uaccess.c : "d" (reg0) : "cc", "memory"); reg0 182 arch/s390/lib/uaccess.c register unsigned long reg0 asm("0") = 0x010000UL; reg0 205 arch/s390/lib/uaccess.c : "d" (reg0) : "cc", "memory"); reg0 257 arch/s390/lib/uaccess.c register unsigned long reg0 asm("0") = 0x010001UL; reg0 273 arch/s390/lib/uaccess.c : "d" (reg0) : "cc", "memory"); reg0 321 arch/s390/lib/uaccess.c register unsigned long reg0 asm("0") = 0x010000UL; reg0 343 arch/s390/lib/uaccess.c : "a" (empty_zero_page), "d" (reg0) : "cc", "memory"); reg0 396 arch/s390/lib/uaccess.c register unsigned long reg0 asm("0") = 0; reg0 411 arch/s390/lib/uaccess.c : "d" (reg0) : "cc", "memory"); reg0 140 arch/sparc/kernel/prom_32.c unsigned int *intr, *device, *vendor, reg0; reg0 149 arch/sparc/kernel/prom_32.c reg0 = (unsigned int)dp->phandle; reg0 152 arch/sparc/kernel/prom_32.c reg0 = regs->phys_addr; reg0 173 arch/sparc/kernel/prom_32.c *intr, reg0); reg0 1017 drivers/edac/amd64_edac.c int reg0 = DCSB0 + (cs * 4); reg0 1022 drivers/edac/amd64_edac.c if (!amd64_read_dct_pci_cfg(pvt, 0, reg0, base0)) reg0 1024 drivers/edac/amd64_edac.c cs, *base0, reg0); reg0 1029 drivers/edac/amd64_edac.c if (!amd64_read_dct_pci_cfg(pvt, 1, reg0, base1)) reg0 1032 drivers/edac/amd64_edac.c : reg0); reg0 1036 drivers/edac/amd64_edac.c int reg0 = DCSM0 + (cs * 4); reg0 1041 drivers/edac/amd64_edac.c if (!amd64_read_dct_pci_cfg(pvt, 0, reg0, mask0)) reg0 1043 drivers/edac/amd64_edac.c cs, *mask0, reg0); reg0 1048 drivers/edac/amd64_edac.c if (!amd64_read_dct_pci_cfg(pvt, 1, reg0, mask1)) reg0 1051 drivers/edac/amd64_edac.c : reg0); reg0 392 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c uint32_t reg0, uint32_t reg1, reg0 395 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_ring_emit_wreg(ring, reg0, ref); reg0 167 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h uint32_t reg0, uint32_t reg1, reg0 270 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h uint32_t reg0, uint32_t val0, reg0 141 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c uint32_t reg0, uint32_t reg1, reg0 152 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c amdgpu_ring_emit_reg_write_reg_wait(ring, reg0, reg1, reg0 177 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c pr_err("failed to write reg %x wait reg %x\n", reg0, reg1); reg0 297 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h uint32_t reg0, uint32_t rreg1, reg0 4836 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint32_t reg0, uint32_t reg1, reg0 4846 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, reg0 4849 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_emit_reg_write_reg_wait_helper(ring, reg0, reg1, reg0 5451 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint32_t reg0, uint32_t reg1, reg0 5460 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, reg0 5463 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_emit_reg_write_reg_wait_helper(ring, reg0, reg1, reg0 1196 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c uint32_t reg0, uint32_t reg1, reg0 1199 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ring_emit_wreg(ring, reg0, ref); reg0 1201 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ring_emit_reg_wait(ring, reg0, 0, 0); reg0 262 drivers/gpu/drm/gma500/intel_gmbus.c GMBUS_REG_WRITE(GMBUS0 + reg_offset, bus->reg0); reg0 350 drivers/gpu/drm/gma500/intel_gmbus.c bus->reg0 & 0xff, bus->adapter.name); reg0 354 drivers/gpu/drm/gma500/intel_gmbus.c bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff); reg0 429 drivers/gpu/drm/gma500/intel_gmbus.c bus->reg0 = i | GMBUS_RATE_100KHZ; reg0 459 drivers/gpu/drm/gma500/intel_gmbus.c bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | (speed << 8); reg0 470 drivers/gpu/drm/gma500/intel_gmbus.c bus->reg0 & 0xff); reg0 260 drivers/gpu/drm/gma500/psb_drv.h u32 reg0; reg0 4851 drivers/gpu/drm/i915/display/intel_display_power.c static bool vlv_punit_is_power_gated(struct drm_i915_private *dev_priv, u32 reg0) reg0 4856 drivers/gpu/drm/i915/display/intel_display_power.c ret = (vlv_punit_read(dev_priv, reg0) & SSPM0_SSC_MASK) == SSPM0_SSC_PWR_GATE; reg0 604 drivers/gpu/drm/i915/display/intel_gmbus.c I915_WRITE_FW(GMBUS0, gmbus0_source | bus->reg0); reg0 610 drivers/gpu/drm/i915/display/intel_gmbus.c gmbus0_source | bus->reg0); reg0 614 drivers/gpu/drm/i915/display/intel_gmbus.c gmbus0_source | bus->reg0, 0); reg0 696 drivers/gpu/drm/i915/display/intel_gmbus.c bus->adapter.name, bus->reg0 & 0xff); reg0 880 drivers/gpu/drm/i915/display/intel_gmbus.c bus->reg0 = pin | GMBUS_RATE_100KHZ; reg0 921 drivers/gpu/drm/i915/display/intel_gmbus.c bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | speed; reg0 511 drivers/gpu/drm/i915/i915_drv.h u32 reg0; reg0 340 drivers/gpu/drm/mga/mga_drv.h #define DMA_BLOCK(reg0, val0, reg1, val1, reg2, val2, reg3, val3) \ reg0 342 drivers/gpu/drm/mga/mga_drv.h DMA_WRITE(0, ((DMAREG(reg0) << 0) | \ reg0 420 drivers/gpu/drm/r128/r128_drv.h #define CCE_PACKET1(reg0, reg1) (R128_CCE_PACKET1 | \ reg0 421 drivers/gpu/drm/r128/r128_drv.h (((reg1) >> 2) << 11) | ((reg0) >> 2)) reg0 295 drivers/hwmon/w83795.c u8 reg0, reg1; reg0 299 drivers/hwmon/w83795.c reg0 = find_closest_descending(val, pwm_freq_cksel0, reg0 302 drivers/hwmon/w83795.c return reg0; reg0 303 drivers/hwmon/w83795.c best0 = pwm_freq_cksel0[reg0]; reg0 315 drivers/hwmon/w83795.c return reg0; reg0 681 drivers/iio/adc/twl6030-gpadc.c static int twl6032_get_trim_value(u8 *trim_regs, unsigned int reg0, reg0 687 drivers/iio/adc/twl6030-gpadc.c val = (trim_regs[reg0] & mask0) << shift0; reg0 21 drivers/media/dvb-frontends/a8293.c u8 reg0, reg1; reg0 28 drivers/media/dvb-frontends/a8293.c reg0 = 0x10; reg0 32 drivers/media/dvb-frontends/a8293.c reg0 = 0x31; reg0 36 drivers/media/dvb-frontends/a8293.c reg0 = 0x38; reg0 42 drivers/media/dvb-frontends/a8293.c if (reg0 != dev->reg[0]) { reg0 43 drivers/media/dvb-frontends/a8293.c ret = i2c_master_send(client, ®0, 1); reg0 46 drivers/media/dvb-frontends/a8293.c dev->reg[0] = reg0; reg0 241 drivers/media/dvb-frontends/m88rs2000.c u8 reg0, reg1; reg0 245 drivers/media/dvb-frontends/m88rs2000.c reg0 = m88rs2000_readreg(state, 0xb1); reg0 249 drivers/media/dvb-frontends/m88rs2000.c m88rs2000_writereg(state, 0xb1, reg0); reg0 259 drivers/media/dvb-frontends/m88rs2000.c u8 reg0, reg1; reg0 261 drivers/media/dvb-frontends/m88rs2000.c reg0 = m88rs2000_readreg(state, 0xb1); reg0 268 drivers/media/dvb-frontends/m88rs2000.c reg0 |= 0x4; reg0 269 drivers/media/dvb-frontends/m88rs2000.c reg0 &= 0xbc; reg0 278 drivers/media/dvb-frontends/m88rs2000.c m88rs2000_writereg(state, 0xb1, reg0); reg0 384 drivers/media/dvb-frontends/stv6110.c u8 reg0[] = { 0x00, 0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e }; reg0 390 drivers/media/dvb-frontends/stv6110.c .buf = reg0, reg0 397 drivers/media/dvb-frontends/stv6110.c reg0[2] &= ~0xc0; reg0 398 drivers/media/dvb-frontends/stv6110.c reg0[2] |= (config->clk_div << 6); reg0 421 drivers/media/dvb-frontends/stv6110.c memcpy(&priv->regs, ®0[1], 8); reg0 31 drivers/media/dvb-frontends/tda10021.c u8 reg0; reg0 119 drivers/media/dvb-frontends/tda10021.c static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0, reg0 122 drivers/media/dvb-frontends/tda10021.c reg0 |= state->reg0 & 0x63; reg0 125 drivers/media/dvb-frontends/tda10021.c reg0 &= ~0x20; reg0 127 drivers/media/dvb-frontends/tda10021.c reg0 |= 0x20; reg0 129 drivers/media/dvb-frontends/tda10021.c _tda10021_writereg (state, 0x00, reg0 & 0xfe); reg0 130 drivers/media/dvb-frontends/tda10021.c _tda10021_writereg (state, 0x00, reg0 | 0x01); reg0 132 drivers/media/dvb-frontends/tda10021.c state->reg0 = reg0; reg0 394 drivers/media/dvb-frontends/tda10021.c p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF; reg0 395 drivers/media/dvb-frontends/tda10021.c p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; reg0 451 drivers/media/dvb-frontends/tda10021.c state->reg0 = tda10021_inittab[0]; reg0 38 drivers/media/dvb-frontends/tda10023.c u8 reg0; reg0 144 drivers/media/dvb-frontends/tda10023.c static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0) reg0 146 drivers/media/dvb-frontends/tda10023.c reg0 |= state->reg0 & 0x63; reg0 148 drivers/media/dvb-frontends/tda10023.c tda10023_writereg (state, 0x00, reg0 & 0xfe); reg0 149 drivers/media/dvb-frontends/tda10023.c tda10023_writereg (state, 0x00, reg0 | 0x01); reg0 151 drivers/media/dvb-frontends/tda10023.c state->reg0 = reg0; reg0 466 drivers/media/dvb-frontends/tda10023.c p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; reg0 529 drivers/media/dvb-frontends/tda10023.c state->reg0 = REG0_INIT_VAL; reg0 43 drivers/media/dvb-frontends/tua6100.c u8 reg0[] = { 0x00, 0x00 }; reg0 44 drivers/media/dvb-frontends/tua6100.c struct i2c_msg msg = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; reg0 63 drivers/media/dvb-frontends/tua6100.c u8 reg0[] = { 0x00, 0x00 }; reg0 66 drivers/media/dvb-frontends/tua6100.c struct i2c_msg msg0 = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; reg0 76 drivers/media/dvb-frontends/tua6100.c reg0[1] = 0x03; reg0 78 drivers/media/dvb-frontends/tua6100.c reg0[1] = 0x07; reg0 30 drivers/media/dvb-frontends/ves1820.c u8 reg0; reg0 82 drivers/media/dvb-frontends/ves1820.c u8 reg0, enum fe_spectral_inversion inversion) reg0 84 drivers/media/dvb-frontends/ves1820.c reg0 |= state->reg0 & 0x62; reg0 87 drivers/media/dvb-frontends/ves1820.c if (!state->config->invert) reg0 |= 0x20; reg0 88 drivers/media/dvb-frontends/ves1820.c else reg0 &= ~0x20; reg0 90 drivers/media/dvb-frontends/ves1820.c if (!state->config->invert) reg0 &= ~0x20; reg0 91 drivers/media/dvb-frontends/ves1820.c else reg0 |= 0x20; reg0 94 drivers/media/dvb-frontends/ves1820.c ves1820_writereg(state, 0x00, reg0 & 0xfe); reg0 95 drivers/media/dvb-frontends/ves1820.c ves1820_writereg(state, 0x00, reg0 | 0x01); reg0 97 drivers/media/dvb-frontends/ves1820.c state->reg0 = reg0; reg0 319 drivers/media/dvb-frontends/ves1820.c p->inversion = (state->reg0 & 0x20) ? INVERSION_ON : INVERSION_OFF; reg0 321 drivers/media/dvb-frontends/ves1820.c p->inversion = (!(state->reg0 & 0x20)) ? INVERSION_ON : INVERSION_OFF; reg0 324 drivers/media/dvb-frontends/ves1820.c p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; reg0 374 drivers/media/dvb-frontends/ves1820.c state->reg0 = ves1820_inittab[0]; reg0 860 drivers/media/i2c/ov9650.c u8 reg0, reg1, reg2; reg0 870 drivers/media/i2c/ov9650.c ret = ov965x_read(ov965x, REG_GAIN, ®0); reg0 876 drivers/media/i2c/ov9650.c gain = ((reg1 >> 6) << 8) | reg0; reg0 884 drivers/media/i2c/ov9650.c ret = ov965x_read(ov965x, REG_COM1, ®0); reg0 894 drivers/media/i2c/ov9650.c (reg0 & 0x3); reg0 229 drivers/media/platform/meson/ao-cec-g12a.c u32 reg0, reg1; reg0 231 drivers/media/platform/meson/ao-cec-g12a.c regmap_read(dualdiv_clk->regmap, CECB_CLK_CNTL_REG0, ®0); reg0 237 drivers/media/platform/meson/ao-cec-g12a.c if (reg0 & CECB_CLK_CNTL_DUAL_EN) { reg0 240 drivers/media/platform/meson/ao-cec-g12a.c n1 = FIELD_GET(CECB_CLK_CNTL_N1, reg0) + 1; reg0 241 drivers/media/platform/meson/ao-cec-g12a.c n2 = FIELD_GET(CECB_CLK_CNTL_N2, reg0) + 1; reg0 255 drivers/media/platform/meson/ao-cec-g12a.c n1 = FIELD_GET(CECB_CLK_CNTL_N1, reg0) + 1; reg0 738 drivers/media/platform/ti-vpe/cal.c unsigned int reg0, reg1; reg0 771 drivers/media/platform/ti-vpe/cal.c reg0 = reg_read(ctx->cc, CAL_CSI2_PHY_REG0); reg0 772 drivers/media/platform/ti-vpe/cal.c set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, reg0 774 drivers/media/platform/ti-vpe/cal.c set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); reg0 775 drivers/media/platform/ti-vpe/cal.c set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); reg0 777 drivers/media/platform/ti-vpe/cal.c ctx_dbg(1, ctx, "CSI2_%d_REG0 = 0x%08x\n", (ctx->csi2_port - 1), reg0); reg0 778 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->cc, CAL_CSI2_PHY_REG0, reg0); reg0 179 drivers/net/dsa/lan9303-core.c #define LAN9303_SWITCH_PORT_REG(port, reg0) (0x400 * (port) + (reg0)) reg0 90 drivers/net/ethernet/8390/8390.h unsigned char reg0; /* Register '0' in a WD8013 */ reg0 114 drivers/net/ethernet/8390/ax88796.c int reg0; reg0 117 drivers/net/ethernet/8390/ax88796.c reg0 = ei_inb(ioaddr); reg0 118 drivers/net/ethernet/8390/ax88796.c if (reg0 == 0xFF) reg0 127 drivers/net/ethernet/8390/ax88796.c ei_outb(reg0, ioaddr); reg0 299 drivers/net/ethernet/8390/ne.c int reg0, ret; reg0 306 drivers/net/ethernet/8390/ne.c reg0 = inb_p(ioaddr); reg0 307 drivers/net/ethernet/8390/ne.c if (reg0 == 0xFF) { reg0 321 drivers/net/ethernet/8390/ne.c outb_p(reg0, ioaddr); reg0 96 drivers/net/ethernet/8390/ne2k-pci.c #define ne2k_flags reg0 reg0 224 drivers/net/ethernet/8390/ne2k-pci.c int irq, reg0, chip_idx = ent->driver_data; reg0 257 drivers/net/ethernet/8390/ne2k-pci.c reg0 = inb(ioaddr); reg0 258 drivers/net/ethernet/8390/ne2k-pci.c if (reg0 == 0xFF) reg0 270 drivers/net/ethernet/8390/ne2k-pci.c outb(reg0, ioaddr); reg0 260 drivers/net/ethernet/8390/wd.c int reg0 = inb(ioaddr); reg0 261 drivers/net/ethernet/8390/wd.c if (reg0 == 0xff || reg0 == 0) { reg0 270 drivers/net/ethernet/8390/wd.c dev->mem_start = ((reg0&0x3f) << 13) + (high_addr_bits << 19); reg0 377 drivers/net/ethernet/8390/wd.c ei_status.reg0 = ((dev->mem_start>>13) & 0x3f) | WD_MEMENB; reg0 382 drivers/net/ethernet/8390/wd.c outb(ei_status.reg0, ioaddr); /* WD_CMDREG */ reg0 492 drivers/net/ethernet/8390/wd.c outb(ei_status.reg0 & ~WD_MEMENB, wd_cmdreg); reg0 1076 drivers/net/ethernet/adaptec/starfire.c u16 reg0; reg0 1089 drivers/net/ethernet/adaptec/starfire.c reg0 = mdio_read(dev, np->phys[0], MII_BMCR); reg0 1092 drivers/net/ethernet/adaptec/starfire.c reg0 |= BMCR_ANENABLE | BMCR_ANRESTART; reg0 1094 drivers/net/ethernet/adaptec/starfire.c reg0 &= ~(BMCR_ANENABLE | BMCR_ANRESTART); reg0 1096 drivers/net/ethernet/adaptec/starfire.c reg0 |= BMCR_SPEED100; reg0 1098 drivers/net/ethernet/adaptec/starfire.c reg0 |= BMCR_FULLDPLX; reg0 1104 drivers/net/ethernet/adaptec/starfire.c mdio_write(dev, np->phys[0], MII_BMCR, reg0); reg0 1628 drivers/net/ethernet/adaptec/starfire.c u16 reg0, reg1, reg4, reg5; reg0 1636 drivers/net/ethernet/adaptec/starfire.c reg0 = mdio_read(dev, np->phys[0], MII_BMCR); reg0 1641 drivers/net/ethernet/adaptec/starfire.c if (reg0 & BMCR_ANENABLE) { reg0 1660 drivers/net/ethernet/adaptec/starfire.c if (reg0 & BMCR_SPEED100) reg0 1664 drivers/net/ethernet/adaptec/starfire.c if (reg0 & BMCR_FULLDPLX) reg0 314 drivers/net/ethernet/netronome/nfp/bpf/verifier.c const struct bpf_reg_state *reg0 = cur_regs(env) + BPF_REG_0; reg0 320 drivers/net/ethernet/netronome/nfp/bpf/verifier.c if (!(reg0->type == SCALAR_VALUE && tnum_is_const(reg0->var_off))) { reg0 323 drivers/net/ethernet/netronome/nfp/bpf/verifier.c tnum_strn(tn_buf, sizeof(tn_buf), reg0->var_off); reg0 325 drivers/net/ethernet/netronome/nfp/bpf/verifier.c reg0->type, tn_buf); reg0 329 drivers/net/ethernet/netronome/nfp/bpf/verifier.c imm = reg0->var_off.value; reg0 335 drivers/net/ethernet/netronome/nfp/bpf/verifier.c reg0->type, imm); reg0 623 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 747 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 1521 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 1559 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 5371 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 5544 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 5626 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 6454 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 6494 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 7426 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 7725 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 7817 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 8465 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 8505 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 8542 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 8579 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 8666 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 8852 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 8921 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 9423 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 9467 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 9511 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 9766 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 9884 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 10252 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 10359 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 10875 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 10940 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 11009 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 11151 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 11400 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 11518 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 11593 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 11639 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 11715 drivers/net/ethernet/qlogic/qed/qed_hsi.h __le32 reg0; reg0 2608 drivers/net/ethernet/sun/niu.c u16 reg0 = addr[4] << 8 | addr[5]; reg0 2613 drivers/net/ethernet/sun/niu.c nw64_mac(XMAC_ADDR0, reg0); reg0 2617 drivers/net/ethernet/sun/niu.c nw64_mac(BMAC_ADDR0, reg0); reg0 2633 drivers/net/ethernet/sun/niu.c u16 reg0 = addr[4] << 8 | addr[5]; reg0 2641 drivers/net/ethernet/sun/niu.c nw64_mac(XMAC_ALT_ADDR0(index), reg0); reg0 2645 drivers/net/ethernet/sun/niu.c nw64_mac(BMAC_ALT_ADDR0(index), reg0); reg0 71 drivers/net/wireless/ath/ath10k/spectral.c u32 reg0, reg1; reg0 82 drivers/net/wireless/ath/ath10k/spectral.c reg0 = __le32_to_cpu(fftr->reg0); reg0 119 drivers/net/wireless/ath/ath10k/spectral.c fft_sample->max_index = MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX); reg0 122 drivers/net/wireless/ath/ath10k/spectral.c total_gain_db = MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB); reg0 123 drivers/net/wireless/ath/ath10k/spectral.c base_pwr_db = MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB); reg0 132 drivers/net/wireless/ath/ath10k/spectral.c chain_idx = MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX); reg0 3955 drivers/net/wireless/ath/ath10k/wmi.c u32 reg0, reg1, tsf32l; reg0 3963 drivers/net/wireless/ath/ath10k/wmi.c reg0 = __le32_to_cpu(rr->reg0); reg0 3968 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), reg0 3969 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), reg0 3970 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), reg0 3971 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); reg0 3974 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), reg0 3975 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), reg0 4019 drivers/net/wireless/ath/ath10k/wmi.c pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0); reg0 4051 drivers/net/wireless/ath/ath10k/wmi.c radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX); reg0 4052 drivers/net/wireless/ath/ath10k/wmi.c radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX); reg0 4073 drivers/net/wireless/ath/ath10k/wmi.c u32 reg0, reg1; reg0 4076 drivers/net/wireless/ath/ath10k/wmi.c reg0 = __le32_to_cpu(fftr->reg0); reg0 4082 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), reg0 4083 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), reg0 4084 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), reg0 4085 drivers/net/wireless/ath/ath10k/wmi.c MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); reg0 3499 drivers/net/wireless/ath/ath10k/wmi.h __le32 reg0; /* RADAR_REPORT_REG0_* */ reg0 3537 drivers/net/wireless/ath/ath10k/wmi.h __le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */ reg0 1126 drivers/net/wireless/ralink/rt2x00/rt2500usb.c u16 reg, reg0; reg0 1183 drivers/net/wireless/ralink/rt2x00/rt2500usb.c reg0 = reg; reg0 1193 drivers/net/wireless/ralink/rt2x00/rt2500usb.c rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); reg0 1195 drivers/net/wireless/ralink/rt2x00/rt2500usb.c rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); reg0 122 drivers/pci/controller/pcie-altera.c u32 reg0; reg0 173 drivers/pci/controller/pcie-altera.c cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0); reg0 178 drivers/pci/controller/pcie-altera.c static void s10_tlp_write_tx(struct altera_pcie *pcie, u32 reg0, u32 ctrl) reg0 180 drivers/pci/controller/pcie-altera.c cra_writel(pcie, reg0, RP_TX_REG0); reg0 205 drivers/pci/controller/pcie-altera.c u32 reg0, reg1; reg0 215 drivers/pci/controller/pcie-altera.c reg0 = cra_readl(pcie, RP_RXCPL_REG0); reg0 228 drivers/pci/controller/pcie-altera.c *value = reg0; reg0 291 drivers/pci/controller/pcie-altera.c tlp_rp_regdata.reg0 = headers[0]; reg0 297 drivers/pci/controller/pcie-altera.c tlp_rp_regdata.reg0 = headers[2]; reg0 302 drivers/pci/controller/pcie-altera.c tlp_rp_regdata.reg0 = data; reg0 305 drivers/pci/controller/pcie-altera.c tlp_rp_regdata.reg0 = headers[2]; reg0 898 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c [a] { .fn0 = fn_ ## b, .reg0 = NPCM7XX_GCR_ ## c, .bit0 = d, \ reg0 920 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c int fn0, reg0, bit0; reg0 1421 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c if (cfg->reg0) reg0 1422 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c regmap_update_bits(gcr_regmap, cfg->reg0, reg0 401 drivers/staging/octeon/ethernet-tx.c pko_command.s.reg0 = priv->fau + qos * 4; reg0 1153 drivers/staging/octeon/octeon-stubs.h uint64_t reg0:11; reg0 914 drivers/staging/rts5208/rtsx_chip.c u8 reg0 = 0, reg1 = 0; reg0 918 drivers/staging/rts5208/rtsx_chip.c rtsx_read_config_byte(chip, LCTLR, ®0); reg0 919 drivers/staging/rts5208/rtsx_chip.c if (chip->aspm_level[0] != reg0) { reg0 921 drivers/staging/rts5208/rtsx_chip.c chip->aspm_level[0] = reg0; reg0 931 drivers/staging/rts5208/rtsx_chip.c if ((reg0 & 0x03) && (reg1 & 0x03)) reg0 935 drivers/staging/rts5208/rtsx_chip.c if (reg0 & 0x03) reg0 182 drivers/tee/optee/optee_private.h static inline void *reg_pair_to_ptr(u32 reg0, u32 reg1) reg0 184 drivers/tee/optee/optee_private.h return (void *)(unsigned long)(((u64)reg0 << 32) | reg1); reg0 187 drivers/tee/optee/optee_private.h static inline void reg_pair_from_64(u32 *reg0, u32 *reg1, u64 val) reg0 189 drivers/tee/optee/optee_private.h *reg0 = val >> 32; reg0 196 include/linux/qed/fcoe_common.h __le32 reg0; reg0 837 include/linux/qed/iscsi_common.h __le32 reg0; reg0 1545 include/linux/qed/iscsi_common.h __le32 reg0; reg0 312 net/iucv/iucv.c register unsigned long reg0 asm ("0"); reg0 316 net/iucv/iucv.c reg0 = command; reg0 322 net/iucv/iucv.c : "=d" (ccode), "=m" (*parm), "+d" (reg0), "+a" (reg1) reg0 345 net/iucv/iucv.c register unsigned long reg0 asm ("0"); reg0 349 net/iucv/iucv.c reg0 = IUCV_QUERY; reg0 355 net/iucv/iucv.c : "=d" (ccode), "+d" (reg0), "+d" (reg1) : : "cc");