reference_div 578 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ppll->reference_div = 0; reference_div 618 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c spll->reference_div = 0; reference_div 645 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c mpll->reference_div = 0; reference_div 386 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c spll->reference_div = 0; reference_div 409 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c mpll->reference_div = 0; reference_div 195 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h uint32_t reference_div; reference_div 142 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c ref_div_min = pll->reference_div; reference_div 148 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c ref_div_max = pll->reference_div; reference_div 851 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll->reference_div = amdgpu_crtc->pll_reference_div; reference_div 1098 drivers/gpu/drm/radeon/atombios_crtc.c pll->reference_div = radeon_crtc->pll_reference_div; reference_div 1160 drivers/gpu/drm/radeon/radeon_atombios.c p1pll->reference_div = 0; reference_div 1206 drivers/gpu/drm/radeon/radeon_atombios.c spll->reference_div = 0; reference_div 1233 drivers/gpu/drm/radeon/radeon_atombios.c mpll->reference_div = 0; reference_div 121 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; reference_div 122 drivers/gpu/drm/radeon/radeon_clocks.c if (p1pll->reference_div < 2) reference_div 123 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = 12; reference_div 124 drivers/gpu/drm/radeon/radeon_clocks.c p2pll->reference_div = p1pll->reference_div; reference_div 150 drivers/gpu/drm/radeon/radeon_clocks.c spll->reference_div = mpll->reference_div = reference_div 197 drivers/gpu/drm/radeon/radeon_clocks.c if (p1pll->reference_div < 2) { reference_div 201 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = reference_div 204 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; reference_div 205 drivers/gpu/drm/radeon/radeon_clocks.c if (p1pll->reference_div < 2) reference_div 206 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = 12; reference_div 208 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = 12; reference_div 210 drivers/gpu/drm/radeon/radeon_clocks.c if (p2pll->reference_div < 2) reference_div 211 drivers/gpu/drm/radeon/radeon_clocks.c p2pll->reference_div = 12; reference_div 213 drivers/gpu/drm/radeon/radeon_clocks.c if (spll->reference_div < 2) reference_div 214 drivers/gpu/drm/radeon/radeon_clocks.c spll->reference_div = reference_div 218 drivers/gpu/drm/radeon/radeon_clocks.c if (mpll->reference_div < 2) reference_div 219 drivers/gpu/drm/radeon/radeon_clocks.c mpll->reference_div = spll->reference_div; reference_div 240 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = reference_div 242 drivers/gpu/drm/radeon/radeon_clocks.c if (p1pll->reference_div < 2) reference_div 243 drivers/gpu/drm/radeon/radeon_clocks.c p1pll->reference_div = 12; reference_div 244 drivers/gpu/drm/radeon/radeon_clocks.c p2pll->reference_div = p1pll->reference_div; reference_div 266 drivers/gpu/drm/radeon/radeon_clocks.c spll->reference_div = reference_div 269 drivers/gpu/drm/radeon/radeon_clocks.c mpll->reference_div = spll->reference_div; reference_div 355 drivers/gpu/drm/radeon/radeon_clocks.c int ref_div = spll->reference_div; reference_div 749 drivers/gpu/drm/radeon/radeon_combios.c p1pll->reference_div = RBIOS16(pll_info + 0x10); reference_div 766 drivers/gpu/drm/radeon/radeon_combios.c spll->reference_div = RBIOS16(pll_info + 0x1c); reference_div 781 drivers/gpu/drm/radeon/radeon_combios.c mpll->reference_div = RBIOS16(pll_info + 0x28); reference_div 983 drivers/gpu/drm/radeon/radeon_display.c ref_div_min = pll->reference_div; reference_div 989 drivers/gpu/drm/radeon/radeon_display.c ref_div_max = pll->reference_div; reference_div 1148 drivers/gpu/drm/radeon/radeon_display.c min_ref_div = max_ref_div = pll->reference_div; reference_div 741 drivers/gpu/drm/radeon/radeon_legacy_crtc.c uint32_t reference_div = 0; reference_div 820 drivers/gpu/drm/radeon/radeon_legacy_crtc.c &reference_div, &post_divider); reference_div 833 drivers/gpu/drm/radeon/radeon_legacy_crtc.c reference_div, reference_div 836 drivers/gpu/drm/radeon/radeon_legacy_crtc.c pll_ref_div = reference_div; reference_div 170 drivers/gpu/drm/radeon/radeon_mode.h uint32_t reference_div;