refcyc_per_req_delivery_pre_l  709 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 		ttu_attr->refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l  969 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 		&ttu_attr->refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l  231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delivery_l,
refcyc_per_req_delivery_pre_l  312 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delivery_l,
refcyc_per_req_delivery_pre_l  277 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 		ttu_attr->refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l 1167 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 		&ttu_attr->refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l  887 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	double refcyc_per_req_delivery_pre_l;
refcyc_per_req_delivery_pre_l 1189 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	refcyc_per_req_delivery_pre_l = 0.;
refcyc_per_req_delivery_pre_l 1284 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib,
refcyc_per_req_delivery_pre_l 1307 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l 1312 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
refcyc_per_req_delivery_pre_l 1526 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
refcyc_per_req_delivery_pre_l  887 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	double refcyc_per_req_delivery_pre_l;
refcyc_per_req_delivery_pre_l 1189 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	refcyc_per_req_delivery_pre_l = 0.;
refcyc_per_req_delivery_pre_l 1284 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib,
refcyc_per_req_delivery_pre_l 1307 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l 1312 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
refcyc_per_req_delivery_pre_l 1526 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
refcyc_per_req_delivery_pre_l  934 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	double refcyc_per_req_delivery_pre_l;
refcyc_per_req_delivery_pre_l 1241 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	refcyc_per_req_delivery_pre_l = 0.;
refcyc_per_req_delivery_pre_l 1344 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(
refcyc_per_req_delivery_pre_l 1370 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l 1376 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
refcyc_per_req_delivery_pre_l 1626 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
refcyc_per_req_delivery_pre_l  469 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int refcyc_per_req_delivery_pre_l;
refcyc_per_req_delivery_pre_l  349 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l 1100 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	double refcyc_per_req_delivery_pre_l;
refcyc_per_req_delivery_pre_l 1627 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	refcyc_per_req_delivery_pre_l = 0.;
refcyc_per_req_delivery_pre_l 1734 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(
refcyc_per_req_delivery_pre_l 1756 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 			refcyc_per_req_delivery_pre_l);
refcyc_per_req_delivery_pre_l 1762 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
refcyc_per_req_delivery_pre_l 1767 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));