refcyc_per_req_delivery_pre_cur1  234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
refcyc_per_req_delivery_pre_cur1  315 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
refcyc_per_req_delivery_pre_cur1  284 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 		REFCYC_PER_REQ_DELIVERY_PRE, ttu_attr->refcyc_per_req_delivery_pre_cur1);
refcyc_per_req_delivery_pre_cur1  900 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	double refcyc_per_req_delivery_pre_cur1;
refcyc_per_req_delivery_pre_cur1 1381 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	refcyc_per_req_delivery_pre_cur1 = 0.0;
refcyc_per_req_delivery_pre_cur1 1385 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 				&refcyc_per_req_delivery_pre_cur1,
refcyc_per_req_delivery_pre_cur1 1538 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 =
refcyc_per_req_delivery_pre_cur1 1539 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			(unsigned int) (refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10));
refcyc_per_req_delivery_pre_cur1  900 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	double refcyc_per_req_delivery_pre_cur1;
refcyc_per_req_delivery_pre_cur1 1381 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	refcyc_per_req_delivery_pre_cur1 = 0.0;
refcyc_per_req_delivery_pre_cur1 1385 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 				&refcyc_per_req_delivery_pre_cur1,
refcyc_per_req_delivery_pre_cur1 1538 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 =
refcyc_per_req_delivery_pre_cur1 1539 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			(unsigned int) (refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10));
refcyc_per_req_delivery_pre_cur1  947 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	double refcyc_per_req_delivery_pre_cur1;
refcyc_per_req_delivery_pre_cur1 1453 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	refcyc_per_req_delivery_pre_cur1 = 0.0;
refcyc_per_req_delivery_pre_cur1 1458 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 				&refcyc_per_req_delivery_pre_cur1,
refcyc_per_req_delivery_pre_cur1 1638 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 =
refcyc_per_req_delivery_pre_cur1 1639 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			(unsigned int) (refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10));
refcyc_per_req_delivery_pre_cur1  472 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int refcyc_per_req_delivery_pre_cur1;
refcyc_per_req_delivery_pre_cur1  370 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_pre_cur1);