refcyc_per_req_delivery_pre_cur0  714 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 		REFCYC_PER_REQ_DELIVERY_PRE, ttu_attr->refcyc_per_req_delivery_pre_cur0);
refcyc_per_req_delivery_pre_cur0  233 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1,
refcyc_per_req_delivery_pre_cur0  314 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1,
refcyc_per_req_delivery_pre_cur0  282 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 		REFCYC_PER_REQ_DELIVERY_PRE, ttu_attr->refcyc_per_req_delivery_pre_cur0);
refcyc_per_req_delivery_pre_cur0  898 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	double refcyc_per_req_delivery_pre_cur0;
refcyc_per_req_delivery_pre_cur0 1365 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	refcyc_per_req_delivery_pre_cur0 = 0.0;
refcyc_per_req_delivery_pre_cur0 1369 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 				&refcyc_per_req_delivery_pre_cur0,
refcyc_per_req_delivery_pre_cur0 1534 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_cur0 =
refcyc_per_req_delivery_pre_cur0 1535 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			(unsigned int) (refcyc_per_req_delivery_pre_cur0 * dml_pow(2, 10));
refcyc_per_req_delivery_pre_cur0  898 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	double refcyc_per_req_delivery_pre_cur0;
refcyc_per_req_delivery_pre_cur0 1365 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	refcyc_per_req_delivery_pre_cur0 = 0.0;
refcyc_per_req_delivery_pre_cur0 1369 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 				&refcyc_per_req_delivery_pre_cur0,
refcyc_per_req_delivery_pre_cur0 1534 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_cur0 =
refcyc_per_req_delivery_pre_cur0 1535 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			(unsigned int) (refcyc_per_req_delivery_pre_cur0 * dml_pow(2, 10));
refcyc_per_req_delivery_pre_cur0  945 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	double refcyc_per_req_delivery_pre_cur0;
refcyc_per_req_delivery_pre_cur0 1436 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	refcyc_per_req_delivery_pre_cur0 = 0.0;
refcyc_per_req_delivery_pre_cur0 1441 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 				&refcyc_per_req_delivery_pre_cur0,
refcyc_per_req_delivery_pre_cur0 1634 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	disp_ttu_regs->refcyc_per_req_delivery_pre_cur0 =
refcyc_per_req_delivery_pre_cur0 1635 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			(unsigned int) (refcyc_per_req_delivery_pre_cur0 * dml_pow(2, 10));
refcyc_per_req_delivery_pre_cur0  471 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int refcyc_per_req_delivery_pre_cur0;
refcyc_per_req_delivery_pre_cur0  364 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_pre_cur0);
refcyc_per_req_delivery_pre_cur0 1104 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	double refcyc_per_req_delivery_pre_cur0;
refcyc_per_req_delivery_pre_cur0 1631 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	refcyc_per_req_delivery_pre_cur0 = 0.;
refcyc_per_req_delivery_pre_cur0 1843 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 			refcyc_per_req_delivery_pre_cur0 = hactive_cur0 * ref_freq_to_pix_freq
refcyc_per_req_delivery_pre_cur0 1846 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 			refcyc_per_req_delivery_pre_cur0 = (double) refclk_freq_in_mhz
refcyc_per_req_delivery_pre_cur0 1851 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		disp_ttu_regs->refcyc_per_req_delivery_pre_cur0 =
refcyc_per_req_delivery_pre_cur0 1852 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 				(unsigned int) (refcyc_per_req_delivery_pre_cur0 * dml_pow(2, 10));
refcyc_per_req_delivery_pre_cur0 1853 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		ASSERT(refcyc_per_req_delivery_pre_cur0 < dml_pow(2, 13));
refcyc_per_req_delivery_pre_cur0 1880 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 				refcyc_per_req_delivery_pre_cur0);
refcyc_per_req_delivery_pre_cur0 1890 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		disp_ttu_regs->refcyc_per_req_delivery_pre_cur0 = 0;