refcyc_per_req_delivery_pre_cur 66 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c double *refcyc_per_req_delivery_pre_cur, refcyc_per_req_delivery_pre_cur 1616 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c double *refcyc_per_req_delivery_pre_cur, refcyc_per_req_delivery_pre_cur 1636 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c *refcyc_per_req_delivery_pre_cur = 0.0; refcyc_per_req_delivery_pre_cur 1661 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c *refcyc_per_req_delivery_pre_cur = hactive_cur * ref_freq_to_pix_freq refcyc_per_req_delivery_pre_cur 1664 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c *refcyc_per_req_delivery_pre_cur = (double) refclk_freq_in_mhz refcyc_per_req_delivery_pre_cur 1669 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c ASSERT(*refcyc_per_req_delivery_pre_cur < dml_pow(2, 13)); refcyc_per_req_delivery_pre_cur 1694 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c *refcyc_per_req_delivery_pre_cur); refcyc_per_req_delivery_pre_cur 66 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c double *refcyc_per_req_delivery_pre_cur, refcyc_per_req_delivery_pre_cur 1616 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c double *refcyc_per_req_delivery_pre_cur, refcyc_per_req_delivery_pre_cur 1636 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c *refcyc_per_req_delivery_pre_cur = 0.0; refcyc_per_req_delivery_pre_cur 1661 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c *refcyc_per_req_delivery_pre_cur = hactive_cur * ref_freq_to_pix_freq refcyc_per_req_delivery_pre_cur 1664 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c *refcyc_per_req_delivery_pre_cur = (double) refclk_freq_in_mhz refcyc_per_req_delivery_pre_cur 1669 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c ASSERT(*refcyc_per_req_delivery_pre_cur < dml_pow(2, 13)); refcyc_per_req_delivery_pre_cur 1694 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c *refcyc_per_req_delivery_pre_cur); refcyc_per_req_delivery_pre_cur 44 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c double *refcyc_per_req_delivery_pre_cur, refcyc_per_req_delivery_pre_cur 1730 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c double *refcyc_per_req_delivery_pre_cur, refcyc_per_req_delivery_pre_cur 1750 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c *refcyc_per_req_delivery_pre_cur = 0.0; refcyc_per_req_delivery_pre_cur 1775 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c *refcyc_per_req_delivery_pre_cur = hactive_cur * ref_freq_to_pix_freq refcyc_per_req_delivery_pre_cur 1778 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c *refcyc_per_req_delivery_pre_cur = (double) refclk_freq_in_mhz refcyc_per_req_delivery_pre_cur 1783 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c ASSERT(*refcyc_per_req_delivery_pre_cur < dml_pow(2, 13)); refcyc_per_req_delivery_pre_cur 1813 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c *refcyc_per_req_delivery_pre_cur);