refcyc_per_meta_chunk_nom_l 617 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_NOM_L, dlg_attr->refcyc_per_meta_chunk_nom_l); refcyc_per_meta_chunk_nom_l 913 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_NOM_L, &dlg_attr->refcyc_per_meta_chunk_nom_l); refcyc_per_meta_chunk_nom_l 211 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c dlg_regs->dst_y_per_meta_row_nom_c, dlg_regs->refcyc_per_meta_chunk_nom_l, refcyc_per_meta_chunk_nom_l 271 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c dlg_regs->dst_y_per_meta_row_nom_c, dlg_regs->refcyc_per_meta_chunk_nom_l, refcyc_per_meta_chunk_nom_l 118 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_NOM_L, dlg_attr->refcyc_per_meta_chunk_nom_l); refcyc_per_meta_chunk_nom_l 1111 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_NOM_L, &dlg_attr->refcyc_per_meta_chunk_nom_l); refcyc_per_meta_chunk_nom_l 1472 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = (unsigned int) ((double) meta_row_height_l refcyc_per_meta_chunk_nom_l 1475 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c if (disp_dlg_regs->refcyc_per_meta_chunk_nom_l >= (unsigned int) dml_pow(2, 23)) refcyc_per_meta_chunk_nom_l 1476 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = dml_pow(2, 23) - 1; refcyc_per_meta_chunk_nom_l 1472 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = (unsigned int) ((double) meta_row_height_l refcyc_per_meta_chunk_nom_l 1475 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c if (disp_dlg_regs->refcyc_per_meta_chunk_nom_l >= (unsigned int) dml_pow(2, 23)) refcyc_per_meta_chunk_nom_l 1476 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = dml_pow(2, 23) - 1; refcyc_per_meta_chunk_nom_l 1572 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = (unsigned int) ((double) meta_row_height_l refcyc_per_meta_chunk_nom_l 1575 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c if (disp_dlg_regs->refcyc_per_meta_chunk_nom_l >= (unsigned int) dml_pow(2, 23)) refcyc_per_meta_chunk_nom_l 1576 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = dml_pow(2, 23) - 1; refcyc_per_meta_chunk_nom_l 437 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int refcyc_per_meta_chunk_nom_l; refcyc_per_meta_chunk_nom_l 284 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c dlg_regs.refcyc_per_meta_chunk_nom_l); refcyc_per_meta_chunk_nom_l 1571 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = (unsigned int) ((double) meta_row_height_l refcyc_per_meta_chunk_nom_l 1574 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c if (disp_dlg_regs->refcyc_per_meta_chunk_nom_l >= (unsigned int) dml_pow(2, 23)) refcyc_per_meta_chunk_nom_l 1575 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c disp_dlg_regs->refcyc_per_meta_chunk_nom_l = dml_pow(2, 23) - 1;