refcyc_per_meta_chunk_flip_l  207 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				dlg_regs->refcyc_per_pte_group_flip_c, dlg_regs->refcyc_per_meta_chunk_flip_l,
refcyc_per_meta_chunk_flip_l  267 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				dlg_regs->refcyc_per_pte_group_flip_c, dlg_regs->refcyc_per_meta_chunk_flip_l,
refcyc_per_meta_chunk_flip_l  269 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 		REFCYC_PER_META_CHUNK_FLIP_L, dlg_attr->refcyc_per_meta_chunk_flip_l);
refcyc_per_meta_chunk_flip_l 1436 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	disp_dlg_regs->refcyc_per_meta_chunk_flip_l = (unsigned int) (dst_y_per_row_flip * htotal
refcyc_per_meta_chunk_flip_l 1436 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	disp_dlg_regs->refcyc_per_meta_chunk_flip_l = (unsigned int) (dst_y_per_row_flip * htotal
refcyc_per_meta_chunk_flip_l 1514 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	disp_dlg_regs->refcyc_per_meta_chunk_flip_l = (unsigned int) (dst_y_per_row_flip * htotal
refcyc_per_meta_chunk_flip_l  429 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int refcyc_per_meta_chunk_flip_l;
refcyc_per_meta_chunk_flip_l  260 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			dlg_regs.refcyc_per_meta_chunk_flip_l);