refcyc_per_line_delivery_pre_c 705 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, dlg_attr->refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 917 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr->refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 213 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c dlg_regs->refcyc_per_line_delivery_pre_c, dlg_regs->refcyc_per_line_delivery_l, refcyc_per_line_delivery_pre_c 273 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c dlg_regs->refcyc_per_line_delivery_pre_c, dlg_regs->refcyc_per_line_delivery_l, refcyc_per_line_delivery_pre_c 273 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, dlg_attr->refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 1115 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr->refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 883 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c double refcyc_per_line_delivery_pre_c; refcyc_per_line_delivery_pre_c 1185 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_pre_c = 0.; refcyc_per_line_delivery_pre_c 1245 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery(mode_lib, refcyc_per_line_delivery_pre_c 1269 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 1502 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c, refcyc_per_line_delivery_pre_c 1506 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int) dml_pow(2, 13)); refcyc_per_line_delivery_pre_c 883 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c double refcyc_per_line_delivery_pre_c; refcyc_per_line_delivery_pre_c 1185 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_pre_c = 0.; refcyc_per_line_delivery_pre_c 1245 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery(mode_lib, refcyc_per_line_delivery_pre_c 1269 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 1502 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c, refcyc_per_line_delivery_pre_c 1506 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int) dml_pow(2, 13)); refcyc_per_line_delivery_pre_c 930 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c double refcyc_per_line_delivery_pre_c; refcyc_per_line_delivery_pre_c 1237 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_pre_c = 0.; refcyc_per_line_delivery_pre_c 1301 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery( refcyc_per_line_delivery_pre_c 1328 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 1602 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor( refcyc_per_line_delivery_pre_c 1603 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_pre_c, 1); refcyc_per_line_delivery_pre_c 1606 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int)dml_pow(2, 13)); refcyc_per_line_delivery_pre_c 440 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int refcyc_per_line_delivery_pre_c; refcyc_per_line_delivery_pre_c 293 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c dlg_regs.refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 1097 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c double refcyc_per_line_delivery_pre_c; refcyc_per_line_delivery_pre_c 1623 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_pre_c = 0.; refcyc_per_line_delivery_pre_c 1685 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery( refcyc_per_line_delivery_pre_c 1708 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_pre_c); refcyc_per_line_delivery_pre_c 1714 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor( refcyc_per_line_delivery_pre_c 1715 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_pre_c, refcyc_per_line_delivery_pre_c 1720 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int) dml_pow(2, 13));